CPU core
In order to facilitate the management of CPU design, production, and sales, CPU manufacturers will give corresponding codes to various CPU cores, which is the so-called CPU core type.
Different CPUs (different series or the same series) will have different core types (such as Pentium 4's Northwood, Willamette, K6-2's CXT, K6-2+'s ST-50, etc.), Even the same core will have different versions (for example, the Northwood core is divided into B0 and C1 versions). The core version is changed to correct some errors in the previous version and improve certain performance. These changes are generally consumed. The reader is rarely paid attention to. Each core type has its corresponding manufacturing process (such as 0.25um, 0.18um, 0.13um and 0.09um, etc.), core area (this is a key factor in determining the cost of the CPU, and the cost is basically proportional to the core area), Core voltage, current size, number of transistors, size of caches at all levels, main frequency range, pipeline architecture and supported instruction set (two points are the key factors that determine the actual performance and work efficiency of the CPU), power consumption and heat generation , Package method (such as SEP, PGA, FC-PGA, FC-PGA2, etc.), interface type (such as Socket370, Socket A, Socket 478, Socket T, Slot 1, Socket 940, etc.), front-side bus frequency (FSB) Wait a minute. Therefore, the core type determines the performance of the CPU to some extent.
Generally speaking, the new core types tend to have better performance than the old core types (for example, the Northwood core Pentium 4 1.8A GHz with the same frequency is better than the Willamette core Pentium 4 1.8GHz. High), but this is not absolute. This situation generally occurs when the new core type is just launched. Due to imperfect technology or immature new architecture and manufacturing processes, the performance of the new core type may be reduced. Not as good as the performance of the old core type. For example, the actual performance of the early Willamette core Socket 423 Pentium 4 is not as good as the Socket 370 Tualatin core Pentium III and Celeron. The current low-frequency Prescott core Pentium 4 is not as good as the Northwood core Pentium 4, etc., but With the advancement of technology and the continuous improvement and perfection of the new core by CPU manufacturers, the performance of the mid- and late-stage products of the new core will inevitably surpass the old core products.
The development direction of CPU core is lower voltage, lower power consumption, more advanced manufacturing process, integration of more transistors, smaller core area (this will reduce the production cost of CPU and thus Will eventually reduce the selling price of the CPU), more advanced pipeline architecture and more instruction sets, higher front-side bus frequency, integration of more functions (such as integrated memory controller, etc.) and dual-core and multi-core (also That is, there are 2 or more cores inside a CPU) and so on. For ordinary consumers, the most significant advancement in CPU cores is that they can buy more powerful CPUs at a lower price.
In the long history of CPU, there are complicated CPU core types. The following is an introduction to the mainstream core types of Intel CPU and AMD CPU. Introduction to mainstream core types (limited to desktop CPUs, not including notebook CPUs and server/workstation CPUs, and not including older core types).
Intel CPU core
Tualatin
This is also the famous "Tualatin" core, which is Intel’s last CPU core on the Socket 370 architecture. Using 0.13um manufacturing process, the packaging method uses FC-PGA2 and PPGA, the core voltage is also reduced to about 1.5V, the main frequency range is from 1GHz to 1.4GHz, and the external frequency is 100MHz (Celeron) and 133MHz (Pentium III) respectively. The level cache is 512KB (Pentium III-S) and 256KB (Pentium III and Celeron). This is the strongest Socket 370 core, and its performance even exceeds the early low-frequency Pentium 4 series CPU.
Willamette
This is the core used by the early Pentium 4 and P4 Celeron, initially using the Socket 423 interface, and later switched to the Socket 478 interface (the Celeron only has 1.7GHz and 1.8GHz Both are Socket 478 interface), using 0.18um manufacturing process, the front-side bus frequency is 400MHz, the main frequency range is from 1.3GHz to 2.0GHz (Socket 423) and 1.6GHz to 2.0GHz (Socket 478), and the secondary caches are respectively It is 256KB (Pentium 4) and 128KB (Celeron). Note that there are also some models of Pentium 4 with Socket 423 interface that have no secondary cache! The core voltage is about 1.75V, and the packaging uses Socket 423 PPGA INT2, PPGA INT3, OOI 423-pin, PPGA FC-PGA2 and Socket 478 PPGA FC-PGA2, and Celeron’s PPGA and so on. The Willamette core has a backward manufacturing process, large heat generation, and low performance. It has been eliminated and replaced by the Northwood core.
Northwood
This is the core used by the current mainstream Pentium 4 and Celeron. The biggest improvement between it and the Willamette core is the use of a 0.13um manufacturing process, and both use Socket 478 Interface, the core voltage is about 1.5V, the secondary cache is 128KB (Celeron) and 512KB (Pentium 4), the front-side bus frequency is 400/533/800MHz (the Celeron only 400MHz), and the main frequency range is 2.0GHz. To 2.8GHz (Celeron), 1.6GHz to 2.6GHz (400MHz FSB Pentium 4), 2.26GHz to 3.06GHz (533MHz FSB Pentium 4) and 2.4GHz to 3.4GHz (800MHz FSB Pentium 4), and 3.06GHz Pentium 4 and All 800MHz Pentium 4 supports Hyper-Threading Technology (Hyper-Threading Technology), and the packaging uses PPGA FC-PGA2 and PPGA. According to Intel's plan, the Northwood core will soon be replaced by the Prescott core.
Prescott
This is the core used by the current high-end Pentium 4 EE, mainstream Pentium 4 and low-end Celeron D. The biggest difference between the Prescott core and the Northwood core is the use of a 90nm manufacturing process. The L1 data cache has been increased from 8KB to 16KB, the pipeline structure has also been increased from 20 to 31, and it has begun to support the SSE3 instruction set. The Prescott core CPU initially adopted the Socket 478 interface, and now it has basically all switched to the Socket 775 interface, with a core voltage of 1.25-1.525V. In terms of front-side bus frequency, Celeron D is all 533MHz FSB, and other CPUs except Celeron D are 533MHz (does not support hyper-threading technology) and 800MHz (supports hyper-threading technology) and the highest is 1066MHz (supports hyper-threading technology). The secondary cache is 256KB (Celeron D), 1MB (Pentium 4 with Socket 478 interface and Pentium 4 5XX series with Socket 775 interface) and 2MB (Pentium 4 6XX series and Pentium 4 EE). The packaging method adopts PPGA (Socket 478) and PLGA (Socket 775). The Prescott core has been continuously improved and developed since its launch. It has successively added hardware anti-virus technology Execute Disable Bit (EDB), energy-saving power-saving technology Enhanced Intel SpeedStep Technology (EIST), virtualization technology Intel Virtualization Technology (Intel VT) and 64-bit technology EM64T and so on, the second level cache has also increased from the initial 1MB to 2MB. According to Intel's plan, the Prescott core will be replaced by the Cedar Mill core.
Smithfield
This is the core type of Intel’s first dual-core processor. It was released in April 2005. Basically, it can be considered that the Smithfield core is simply a combination of two The prescott core is loosely coupled together. This is a loosely coupled solution based on independent caches. Its advantage is simple technology, but its disadvantage is that its performance is not ideal. Currently Pentium D 8XX series and Pentium EE 8XX series adopt this core. Smithfield core adopts 90nm manufacturing process, all adopt Socket 775 interface, core voltage is about 1.3V, packaging method adopts PLGA, all support hardware anti-virus technology EDB and 64-bit technology EM64T, and all except Pentium D 8X5 and Pentium D 820 Support energy saving technology EIST. The front side bus frequency is 533MHz (Pentium D 8X5) and 800MHz (Pentium D 8X0 and Pentium EE 8XX), the main frequency range is from 2.66GHz to 3.2GHz (Pentium D), 3.2GHz (Pentium EE). The biggest difference between Pentium EE and Pentium D is that Pentium EE supports Hyper-Threading technology while Pentium D does not. The two cores of the Smithfield core each have a 1MB second-level cache. The two cores in the CPU are isolated from each other. The synchronization of the cache data is transmitted between the two cores through the front-side bus through the arbitration unit located on the north bridge chip of the motherboard. So the data delay problem is more serious, and the performance is not satisfactory. According to Intel's plan, the Smithfield core will soon be replaced by the Presler core.
Cedar Mill
This is the core adopted by the Pentium 4 6X1 series and Celeron D 3X2/3X6 series, and it has appeared since the end of 2005. The biggest difference between it and the Prescott core is that it uses a 65nm manufacturing process. Other aspects have not changed much. Basically, it can be considered as a 65nm process version of the Prescott core. The core of Cedar Mill all adopts Socket 775 interface, the core voltage is about 1.3V, and the packaging method adopts PLGA. Among them, all Pentium 4 has 800MHz FSB, 2MB L2 cache, and all support hyper-threading technology, hardware antivirus technology EDB, energy saving technology EIST and 64-bit technology EM64T; Celeron D has 533MHz FSB, 512KB L2 cache , Supports hardware anti-virus technology EDB and 64-bit technology EM64T, does not support hyper-threading technology and energy-saving technology EIST. The Cedar Mill core is also the core type of Intel's last single-core processor on the NetBurst architecture. According to Intel's plan, the Cedar Mill core will gradually be replaced by the Conroe core of the Core architecture.
Presler
This is the core used by Pentium D 9XX and Pentium EE 9XX, Intel launched at the end of 2005. Basically, it can be considered that the Presler core is simply a product of loosely coupling two Cedar Mill cores together. It is a loosely coupled scheme based on independent caches. Its advantage is simple technology, but its disadvantage is that its performance is not ideal. Presler's core uses 65nm manufacturing process, all use Socket 775 interface, core voltage is about 1.3V, packaging method uses PLGA, all support hardware anti-virus technology EDB, energy-saving technology EIST and 64-bit technology EM64T, and in addition to Pentium D 9X5 All support Intel VT virtualization technology. The front side bus frequency is 800MHz (Pentium D) and 1066MHz (Pentium EE). Similar to the Smithfield core, the biggest difference between Pentium EE and Pentium D is that Pentium EE supports Hyper-Threading technology while Pentium D does not, and the two cores each have a 2MB secondary cache. The two cores in the CPU are isolated from each other, and the synchronization of the cache data is also realized by the arbitration unit located on the north bridge chip of the motherboard through the front-side bus transmission between the two cores, so the data delay problem is also more serious. Performance is also not satisfactory. Compared with the Smithfield core, the Presler core has almost no technical innovation except for the 65nm process, the second-level cache of each core is increased to 2MB and the support for virtualization technology, and it can basically be regarded as the Smithfield core. The 65nm process version. The Presler core is also the core type of the Intel processor's last dual-core processor on the NetBurst architecture. It can be said to be the last swan song before NetBurst was abandoned. Later, all Intel desktop processors will be transferred to the Core architecture. According to Intel's plan, the Presler core will be gradually replaced by the Conroe core of the Core architecture starting in the third quarter of 2006.
Yonah
Currently, the Yonah core CPU has dual-core Core Duo and single-core Core Solo. In addition, Celeron M also uses this core. Yonah was launched by Intel in early 2006 Of. This is a core type of single/dual-core processor. Its application feature is that it has great flexibility. It can be used for desktop platforms and mobile platforms; it can be used for dual-core and single-core processors. Core. The core of Yonah comes from the excellent architecture of the well-known processor Pentium M on the mobile platform. It has the advantages of fewer pipeline stages, high execution efficiency, powerful performance, and low power consumption. Yonah core uses 65nm manufacturing process, the core voltage is about 1.1V-1.3V depending on the version, the packaging method uses PPGA, and the interface type is an improved new version of the Socket 478 interface (not compatible with the previous desktop Socket 478). In terms of front-side bus frequency, Core Duo and Core Solo are currently both 667MHz, while Yonah's core Celeron M is 533MHz. In terms of secondary cache, Core Duo and Core Solo are currently 2MB, and Yonah core Celeron M is 1MB. Yonah core supports hardware anti-virus technology EDB and energy-saving power-saving technology EIST, and most models support virtualization technology Intel VT. But its biggest regret is that it does not support 64-bit technology, only 32-bit processors. It is worth noting that for the dual-core Core Duo, its 2MB L2 cache is different in architecture from all current X86 processors. All other X86 processors have independent L2 caches for each core. The Yonah core of Core Duo uses a cache solution similar to that of IBM's multi-core processors-the two cores share a 2MB second-level cache! The shared L2 cache and Intel’s "Smart cache" shared cache technology realize true cache data synchronization, greatly reducing data delay and reducing the occupation of the front-side bus. This is the true dual-core processor in the strict sense! The core of Yonah is a tightly coupled solution for shared cache. Its advantage is ideal performance, but its disadvantage is that the technology is more complicated. However, according to Intel’s plan, all processors on Intel platforms will be transferred to the Core architecture in the future. The Yonah core is actually just a transitional core type. Starting from the third quarter of 2006, it will be used on desktop platforms. Conroe core replaces, and on mobile platforms it will be replaced by Merom core.
Conroe
This is the core type of the updated Intel desktop platform dual-core processor, and its name comes from the small city "Conroe" in Texas, USA. The Conroe core was officially released on July 27, 2006. It is the first CPU core for the new Core Micro-Architecture application on the desktop platform. The Core 2 Duo E6x00 series and Core 2 Extreme X6x00 series currently use this core. Compared with the previous generations of Pentium D and Pentium EE, which use the NetBurst micro-architecture, the Conroe core has the advantages of fewer pipeline stages, high execution efficiency, powerful performance, and low power consumption. The Conroe core uses a 65nm manufacturing process, the core voltage is about 1.3V, the packaging method uses PLGA, and the interface type is still the traditional Socket 775. In terms of front-side bus frequency, Core 2 Duo and Core 2 Extreme are currently 1066MHz, while the top Core 2 Extreme will be upgraded to 1333MHz; in terms of level 1 cache, each core has a 32KB data cache and a 32KB instruction cache , And the data can be directly exchanged between the first-level data caches of the two cores; in the second-level cache, the Conroe cores share 4MB between the two cores. The core of Conroe supports hardware antivirus technology EDB, energy saving technology EIST, 64-bit technology EM64T, and virtualization technology Intel VT. Similar to the cache mechanism of the Yonah core, the second-level cache of the Conroe core is still shared by the two cores, and the cached data is synchronized through the improved Intel Advanced Smart Cache (Intel Advanced Smart Cache) shared cache technology. Conroe core is currently the most advanced desktop platform processor core. It has found a good balance between high performance and low power consumption, which completely overwhelms all current desktop platform dual-core processors, and has a very good overclocking. Ability is indeed the most powerful desktop CPU core at present.
Allendale
This is the core type of the Intel desktop platform dual-core processor released at the same time as Conroe. Its name comes from the small city "Allendale" in southern California, USA. The Allendale core was officially released on July 27, 2006. It is still based on the new Core micro-architecture. Currently, the Core 2 Duo E6x00 series with 1066MHz FSB adopts this core, and the Core 2 Duo E4x00 with 800MHz FSB will be released soon. Series. The second-level cache mechanism of the Allendale core is the same as that of the Conroe core, but the shared second-level cache is reduced to 2MB. The Allendale core still uses a 65nm manufacturing process, the core voltage is about 1.3V, the packaging method uses PLGA, the interface type is still the traditional Socket 775, and it still supports hardware antivirus technology EDB, energy saving technology EIST, 64-bit technology EM64T and virtual Technology Intel VT. Except that the shared L2 cache is reduced to 2MB and the L2 cache is 8-way 64Byte instead of the 16-way 64Byte of the Conroe core, the Allendale core is almost identical to the Conroe core, which can be said to be a simplified version of the Conroe core. Of course, due to the difference in the secondary cache, the Allendale core performance will be slightly inferior to the Conroe core under the same frequency.
Merom
This is the core type of the Intel mobile platform dual-core processor released at the same time as Conroe. Its name comes from the lake "Merom" beside the Jordan River in Israel. The Merom core was officially released on July 27, 2006. It is still based on the new Core micro-architecture. This is the first time that Intel's full-platform (desktop, notebook and server) processors have adopted the same micro-architecture design. This core is currently used There are 667MHz FSB Core 2 Duo T7x00 series and Core 2 Duo T5x00 series. Similar to the desktop version of the Conroe core, the Merom core still uses the 65nm manufacturing process, the core voltage is about 1.3V, the packaging method uses PPGA, and the interface type is still an improved new version of Socket 478 interface compatible with Yonah core Core Duo and Core Solo ( It is not compatible with the previous desktop Socket 478) or Socket 479 interface, and still uses the Socket 479 socket. The Merom core also supports hardware anti-virus technology EDB, energy-saving power-saving technology EIST, 64-bit technology EM64T, and virtualization technology Intel VT. The secondary cache mechanism of the Merom core is also the same as that of the Conroe core. The shared secondary cache of the Core 2 Duo T7x00 series is 4MB, and the shared secondary cache of the Core 2 Duo T5x00 series is 2MB. The main technical characteristics of the Merom core are almost the same as those of the Conroe core, but on the basis of the Conroe core, a variety of methods are used to strengthen power consumption control, so that its TDP power consumption is almost only about half of that of the Conroe core to meet the power saving of the mobile platform. Demand.
Wolfdale
is the development code name of Intel desktop dual-core 45nm process processor. In addition to the process difference between wolfdale and conroe, the biggest difference is the addition of the sse4 instruction set to increase the multimedia audio-visual coding processing capabilities. In addition, wolfdale's l2 cache has also increased to 6mb, and supports 1333mhz front-side bus, as well as multiple intel processor technologies such as virtualization technology (vt) and trusted execution technology (txt).
yorkfield
Yorkfield is derived from the 45nm Penryn architecture. It is an upgraded version of the existing 65nm Core architecture. It will make some improvements to the core architecture and introduce the SSE4 instruction set. Among them, Yorkfield is the successor of the quad-core Core 2 Extreme and Core 2 Quad, and Wolfdale is the dual-core Core 2 Duo. Next generation.
Nehalem
Nehalem core will be used for Xeon DP, which is a dual CPU for servers. Nehalem is a CPU with 4 cores, 8 threads, 64bit, 4 superscalar emission, and out-of-order execution. It has 16-stage pipeline, 48bit virtual addressing and 40bit physical addressing. Simply put, Nehalem is basically built on the framework of Core Microarchitecture, with the addition of SMT, 3-layer Cache, TLB and branch prediction hierarchical, IMC, QPI, and support for DDR3 technologies.
AMD CPU core
Athlon XP core type
Athlon XP has 4 different core types, but they all have something in common: they all use Socket A The interfaces are marked with the nominal value of PR.
(1) Palomino
This is the core of the earliest Athlon XP, using a 0.18um manufacturing process, the core voltage is about 1.75V, the secondary cache is 256KB, and the packaging method uses OPGA , The front side bus frequency is 266MHz.
(2) Thoroughbred
This is the first Athlon XP core with a 0.13um manufacturing process. It is divided into Thoroughbred-A and Thoroughbred-B versions, with a core voltage of 1.65 About V-1.75V, the L2 cache is 256KB, the packaging method is OPGA, and the front-side bus frequency is 266MHz and 333MHz.
(3) Thorton
Using 0.13um manufacturing process, the core voltage is about 1.65V, the L2 cache is 256KB, the packaging method is OPGA, and the front-side bus frequency is 333MHz. It can be seen as Barton that has blocked half of the second-level cache.
(4) Barton
Using 0.13um manufacturing process, the core voltage is about 1.65V, the secondary cache is 512KB, the packaging method is OPGA, and the front-side bus frequency is 333MHz and 400MHz.
The core type of the new Duron
AppleBred
Using the 0.13um manufacturing process, the core voltage is about 1.5V, the secondary cache is 64KB, and the packaging method uses OPGA. The front side bus frequency is 266MHz. It is not marked by the nominal value of PR but marked by the actual frequency. There are three types: 1.4GHz, 1.6GHz and 1.8GHz.
The core type of Athlon 64 series CPU
Sledgehammer
Sledgehammer is the core of AMD server CPU. It is a 64-bit CPU, generally 940 interface, 0.13 micron process . Sledgehammer is powerful and integrates three HyperTransprot buses. The core uses a 12-stage pipeline, 128K first-level cache, integrated 1M second-level cache, and can be used for single-channel to 8-channel CPU servers. Sledgehammer's integrated memory controller has a smaller delay than the traditional memory controller located in the North Bridge. It supports dual-channel DDR memory. Since it is a server CPU, it certainly supports ECC verification.
Clawhammer
Using 0.13um manufacturing process, the core voltage is about 1.5V, the secondary cache is 1MB, the packaging method is mPGA, the Hyper Transport bus is adopted, and a 128bit memory control is built-in Device. Adopt Socket 754, Socket 940 and Socket 939 interfaces.
Newcastle
The main difference between Newcastle and Clawhammer is that the second-level cache is reduced to 512KB (this is also the relatively low-cost policy adopted by AMD for market needs and accelerating the promotion of 64-bit CPUs. As a result), other properties are basically the same.
Winchester
Winchester is a relatively new AMD Athlon 64CPU core, a 64-bit CPU, generally 939 interface, 0.09 micron manufacturing process. This kind of core uses 200MHz FSB, supports 1GHyperTransprot bus, 512K L2 cache, and is cost-effective. Winchester integrates a dual-channel memory controller and supports dual-channel DDR memory. Due to the new technology, Winchester generates less heat than the old Athlon, and its performance is also improved.
Troy
Troy is AMD’s first Opteron core using a 90nm manufacturing process. The Troy core is based on Sledgehammer and adds a number of new technologies, usually 940 pins, with 128K level one cache and 1MB (1,024 KB) level two cache. It also uses 200MHz external frequency, supports 1GHyperTransprot bus, integrates a memory controller, supports dual-channel DDR400 memory, and can support ECC memory. In addition, the Troy core also provides support for SSE-3, which is the same as Intel's Xeon. In general, Troy is a good CPU core.
Venice
The Venice core evolved on the basis of the Winchester core, and its technical parameters are basically the same as Winchester: the same based on the X86-64 architecture, integrated dual-channel memory controller, 512KB L2 cache, 90nm manufacturing process, 200MHz external frequency, support 1GHyperTransprot bus. There are three main changes in Venice: One is the use of Dual Stress Liner (DSL) technology, which can increase the response speed of semiconductor transistors by 24%, so that the CPU has a larger frequency space and is easier to overclock; the other is to provide The support of SSE-3 is the same as Intel's CPU; the third is to further improve the memory controller, to increase the performance of the processor to a certain extent, and more importantly, to increase the compatibility of the memory controller with different DIMM modules and different configurations. In addition, the Venice core also uses dynamic voltage, and different CPUs may have different voltages.
SanDiego
The core of SanDiego, like Venice, evolved on the basis of the core of Winchester. Its technical parameters are very close to that of Venice. Venice has new technologies and new functions, and the core of SanDiego Have the same. However, AMD has positioned SanDiego cores on top of the top Athlon 64 processors, even for server CPUs. SanDiego can be regarded as an advanced version of Venice core, but the cache capacity has been increased from 512KB to 1MB. Of course, due to the increase in the L2 cache, the core size of the SanDiego core has also increased, from 84 square millimeters in the Venice core to 115 square millimeters, and of course the price is also higher.
Orleans
This is the first core type of Socket AM2 single-core Athlon 64 released at the end of May 2006. Its name comes from the French city of Orleans. The core of Manila is positioned as a desktop mid-range processor. It uses a 90nm manufacturing process and supports virtualization technology AMD VT. It still uses a 1000MHz HyperTransport bus with a secondary cache of 512KB. The biggest highlight is the support for dual-channel DDR2 667 memory. The biggest difference between the Socket 754 interface Athlon 64 that supports single-channel DDR 400 memory and the Socket 939 interface Athlon 64 that only supports dual-channel DDR 400 memory. The Orleans core Athlon 64 is also divided into a standard version with TDP power consumption of 62W (core voltage around 1.35V) and an ultra-low power version with TDP power consumption of 35W (core voltage around 1.25V). In addition to supporting dual-channel DDR2 memory and supporting virtualization technology, the Orleans core Athlon 64 has no architectural changes compared to the previous Athlon 64 with Socket 754 interface and Socket 940 interface, and the performance is not much better.
The core type of Sempron series CPU
(1)Paris
Paris core is the successor of Barton core, mainly used for AMD Sempron, early The Sempron part of the 754 interface uses the Paris core. Paris uses a 90nm manufacturing process, supports iSSE2 instruction set, generally 256K L2 cache, 200MHz FSB. The Paris core is a 32-bit CPU, derived from the K8 core, so it also has a memory control unit. The main advantage of the built-in memory controller in the CPU is that the memory controller can run at the CPU frequency, which has a smaller delay than the traditional memory controller located in the North Bridge. Compared with the Sempron CPU with the Socket A interface, the performance of the Sempron using the Paris core has been significantly improved.
(2) Palermo
The Palermo core is currently mainly used for AMD’s Sempron CPU, using Socket 754 interface, 90nm manufacturing process, 1.4V voltage, 200MHz external frequency, 128K or 256K secondary cache. The Palermo core is derived from the Winchester core of K8, and the new E6 stepping version already supports 64 bits. In addition to having the same internal architecture as AMD's high-end processors, it also has AMD's unique technologies such as EVP, Cool'n'Quiet; and HyperTransport, bringing more "coolness" and higher computing power to the majority of users. . Because it is born with the ATHLON64 processor, Palermo also has a memory control unit. The main advantage of the built-in memory controller in the CPU is that the memory controller can run at the CPU frequency, which has a smaller delay than the traditional memory controller located in the North Bridge.
(3) Manila
This is the core type of the first Socket AM2 interface Sempron released at the end of May 2006, and its name comes from Manila, the capital of the Philippines. Manila core is positioned as a desktop low-end processor. It uses a 90nm manufacturing process and does not support the virtualization technology AMD VT. It still uses the 800MHz HyperTransport bus. The secondary cache is 256KB or 128KB. The biggest highlight is the support for dual-channel DDR2 667 memory. The biggest difference between it and the Socket 754 interface Sempron which only supports single-channel DDR 400 memory. Manila core Sempron is divided into a standard version with TDP power consumption of 62W (core voltage around 1.35V) and an ultra-low power version with TDP power consumption of 35W (core voltage around 1.25V). In addition to supporting dual-channel DDR2, Manila core Sempron has no architectural changes compared to the previous Socket 754 interface Sempron, and its performance is not much better.
Athlon 64 X2 dual-core type:
(1)Manchester
This is AMD’s first release on the desktop platform in April 2005 The core type of the dual-core processor evolved on the basis of the Venice core. It can basically be regarded as two Venice cores coupled together, but the degree of collaboration is relatively close. This is a tight coupling based on independent caches. The advantage of the scheme is that the technology is simple, but the disadvantage is that the performance is still not ideal. The Manchester core adopts a 90nm manufacturing process, integrates a dual-channel memory controller, supports a 1000MHz HyperTransprot bus, and all uses a Socket 939 interface. The two cores of the Manchester core independently have 512KB of L2 cache, but the synchronization of the cache data with Intel's Smithfield core and Presler core depends on the arbitration unit on the motherboard northbridge chip through the front-side bus transmission. The difference is that the Manchester core The degree of cooperation between the two cores is quite close. The cache data synchronization is controlled by the built-in SRI (System Request Interface) of the CPU, and the transmission can be realized inside the CPU. In this way, not only the CPU resources are very small, but there is no need to occupy the memory bus resources. The data delay is also greatly reduced compared with Intel's Smithfield core and Presler core, and the collaboration efficiency is obviously better than these two cores. However, since the Manchester core is still independent of the caches of the two cores, it is obviously not as good as Intel's shared cache technology Smart Cache represented by the Yonah core from the architectural point of view. Of course, the shared cache technology requires a redesign of the entire CPU architecture, which is much more difficult than simply coupling the two cores together.
(2) Toledo
This is the core type of AMD’s new high-end dual-core processor on the desktop platform in April 2005. It is very similar to the Manchester core. The difference is The second level cache is different. Toledo evolved on the basis of the San Diego core. It can basically be regarded as two San diego cores simply coupled together, but the degree of collaboration is relatively close. This is a tightly coupled solution based on independent caches. The advantage is that the technology is simple, but the disadvantage is that the performance is still not ideal. Toledo's core adopts a 90nm manufacturing process, integrates a dual-channel memory controller, supports a 1000MHz HyperTransprot bus, and all uses a Socket 939 interface. The two cores of the Toledo core independently have a 1MB second-level cache. Same as the Manchester core, the cache data synchronization is also transmitted inside the CPU through SRI. Compared with the Manchester core, the Toledo core is exactly the same except that the second-level cache of each core is increased to 1MB. It can be regarded as an advanced version of the Manchester core.
(3) Windsor
This is the first core type of Socket AM2 dual-core Athlon 64 X2 and Athlon 64 FX released at the end of May 2006. Its name comes from the United Kingdom Place name Windsor (Windsor). Windsor core is positioned as a desktop high-end processor. It adopts 90nm manufacturing process and supports virtualization technology AMD VT. It still uses 1000MHz HyperTransport bus. In terms of secondary cache, the two cores of Windsor core still use independent secondary cache, Athlon 64 X2 each The core is 512KB or 1024KB, and each core of Athlon 64 FX is 1024KB. The biggest highlight of the Windsor core is the support for dual-channel DDR2 800 memory, which is the biggest difference between it and the Socket 939 interface Athlon 64 X2 and Athlon 64 FX that only support dual-channel DDR 400 memory. Windsor core Athlon 64 FX currently only has FX-62, which has a TDP power consumption of up to 125W; while Athlon 64 X2 is divided into a standard version with a TDP power consumption of 89W (core voltage is about 1.35V), and a TDP power consumption of 65W. Power consumption version (about 1.25V core voltage) and ultra-low power version with TDP power consumption of 35W (about 1.05V core voltage). The cache data synchronization of the Windsor core still relies on the CPU's built-in SRI (System request interface, system request interface) transmission to be implemented inside the CPU. In addition to supporting dual-channel DDR2 memory and supporting virtualization technology, compared to the previous Socket 939 interface Athlon 64 X2 and dual-core Athlon 64 FX have no architectural changes, and their performance is not very impressive. Their performance is still inferior to the Conroe core Core 2 Duo and Core 2 Extreme that Intel will release at the end of July 2006. In addition, AMD has decided to discontinue production of all Athlon 64 X2s with 1024KBx2 L2 cache, except for Athlon 64 FX in terms of reducing costs and improving competitiveness, and only retains Athlon 64 X2 with 512KBx2 L2 cache.
VIA CPU core
The VIA C3 processor is a milestone product on the growth path of VIA's mobile processor. C3 is divided into two versions, desktop and mobile. Many models in the smashing "mobile PC" launched by Elite at that time used this processor. Although the VIA C3 processor does not have very good performance, it has a significant performance gap compared with its competitors, but its low power consumption, high stability, and low price make it popular in the low-end notebook and mobile PC market. Occupies a larger space, laying the foundation of VIA in the field of mobile processors. Following the VIA C3 processor, VIA launched the Antau (Antaur) mobile processor for the notebook computer market in 2003. Antaur adopts the new Nehemiah core, integrates 128K L1 cache and high-efficiency enhanced 64K L2 cache, supports MMX/SSE instruction set, is also manufactured in 0.13 micron process, and continues to use the EPGA packaging method. Its overall performance is better than that of C3 processors. In our test, we found that the performance of the 1GHz Antaur processor has been improved by 150% compared with the previous C3 core, but it is still far from AMD or Intel with the same frequency. Precisely because of this, Antaur's market performance has not brought much market change for C3, C3 is still wandering in the low-end market in the field of mobile processors.
In September 2005, VIA officially announced its C7 and C7-M processor plans to the outside world. The processor product line that had been stagnant for nearly 2 years was restarted, and the first new product was C7. From the analysis of our existing data, the three major technical features of VIA’s processor products should be noted by everyone, and it is these three features that make this processor have a lot of practical value.这就是第一：传统的低功耗设计仍被延续，改进的VIA Enhanced PowerSaverTM技术实力非凡，第二：提升到军事级别的安全性设计让C7处理器具备抢眼的硬件级安全性能，第三：性能方面不在是VIA处理器的软肋。
双核心类型
在2005年以前，主频一直是两大处理器巨头Intel和AMD争相追逐的焦点。而且处理器主频也在Intel和AMD的推动下达到了一个又一个的高峰就在处理器主频提升速度的同时，也发现在目前的情况下，单纯主频的提升已经无法为系统整体性能的提升带来明显的好处，并且高主频带来了处理器巨大的发热量，更为不利是Intel和AMD两家在处理器主频提升上已经有些力不从心了。在这种情况下，Intel和AMD都不约而同地将投向了多核心的发展方向在不用进行大规模开发的情况下将现有产品发展成为理论性能更为强大的多核心处理器系统，无疑是相当明智的选择。
双核处理器就基于单个半导体的一个处理器上拥有两个一样功能的处理器核心，即是将两个物理处理器核心整合入一个内核中。事实上，双核架构并不是什么新技术，不过此前双核心处理器一直是服务器的专利，现在已经开始普及之中。
四核心处理器
四核处理器即是基于单个半导体的一个处理器上拥有四个一样功能的处理器核心。换句话说，将四个物理处理器核心整合入一个核中。企业IT管理者们也一直坚持寻求增进性能而不用提高实际硬件覆盖区的方法。多核处理器解决方案针对这些需求，提供更强的性能而不需要增大能量或实际空间。实际上是将两个Conroe双核处理器封装在一起，英特尔可以借此提高处理器成品率，因为如果四核处理器中如果有任何一个缺陷，都能够让整个处理器报废。 Core 2 Extreme QX6700在WindowsXP系统下被视作四颗CPU，但是分属两组核心的两颗4MB的二级缓存并不能够直接互访，影响执行效率。 Core 2 Extreme QX6700功耗130W，在多任务及多媒体应用中性能提升显著，但是尚缺乏足够的应用软件支持。
多核心处理器
多核心，也指单芯片多处理器（Chip multiprocessors，简称CMP）。 CMP是由美国斯坦福大学提出的，其思想是将大规模并行处理器中的SMP（对称多处理器）集成到同一芯片内，各个处理器并行执行不同的进程。与CMP比较， SMT处理器结构的灵活性比较突出。但是，当半导体工艺进入0.18微米以后，线延时已经超过了门延迟，要求微处理器的设计通过划分许多规模更小、局部性更好的基本单元结构来进行。相比之下，由于CMP结构已经被划分成多个处理器核来设计，每个核都比较简单，有利于优化设计，因此更有发展前途。目前，IBM 的Power 4芯片和Sun的 MAJC5200芯片都采用了CMP结构。多核处理器可以在处理器内部共享缓存，提高缓存利用率，同时简化多处理器系统设计的复杂度。
多核心处理器发展史
2000年IBM、HP、Sun 推出了用于RISC的多核概念，并且成功推出了拥有双内核的HP PA8800和IBM Power4处理器。此类处理器已经成功应用不同领域的服务器产品中，像IBM eServer pSeries 690或HP 9000此类服务器上仍可以看到它们的身影。由于它们相当昂贵的，因此从来没得到广泛应用
05年四月，INTEL推出了第一款供个人使用的双核处理器，打开了处理器历史新的一页
06年底：第一款四核极致版CPU:QX6700(Quad eXtreme 6700)
06年底：第一款四核非极致版CPU:Q6600(Intel Core 2 Quad 6600)
07年五月：第二款四核极致版CPU:QX6800(Quad eXtreme 6800)
双核与四核的区别
四核里面是由两个双核组成，每个双核是共享4M的L2的。
从理论上去看，在两者均未达到满载的时候，成绩应该相差不大。而双方都同时达到满载时，四核的成绩应该比双核好上一倍。
物理四核相对于物理双核提升的幅度最大值为80%左右，超线程四核相对于物理双核提升的最大幅度为40%左右，两者的提升幅度相差约为一倍。
核心内存
核心内存即内核内存，是操作系统为内核对象分配的内存
核心内存是虚拟内存，自己或系统自动设置。
内存在计算机中的作用很大，电脑中所有运行的程序都需要经过内存来执行，如果执行的程序很大或很多，就会导致内存消耗殆尽。为了解决这个问题， Windows中运用了虚拟内存技术，即拿出一部分硬盘空间来充当内存使用，当内存占用完时，电脑就会自动调用硬盘来充当内存，以缓解内存的紧张。举一个例子来说，如果电脑只有128MB物理内存的话，当读取一个容量为200MB的文件时，就必须要用到比较大的虚拟内存，文件被内存读取之后就会先储存到虚拟内存，等待内存把文件全部储存到虚拟内存之后，跟着就会把虚拟内里储存的文件释放到原来的安装目录里了。
Intel六核心处理器 Gulftown
在旧金山的国际固态电路会议ISSCC 2009上，Intel不但宣布了八核心服务器处理器“Nehalem-EX”，还首次介绍了下一代32nm Westmere家族，其中就提到了首款六核心桌面处理器“Gulftown”和首款集成图形核心的“Clarkdale”。
八核心Nehalem-EX基于45纳米工艺Nehalem架构，支持QPI总线互联和超线程技术，集成双芯片、四通道内存控制器，三级缓存容量24MB，晶体管数量也达到了惊人的23亿个，热设计功耗130W，接口为新的LGA1567。
32nm Westmere家族系列仍会全面支持超线程技术，其中Gulftown面向高端桌面，六核心十二线程，具体架构没有披露，但应该会类似于同为六核心设计的Dunnington Xeon。
Clarkdale和Arrandale分别面向主流桌面和笔记本领域，后者还会用于服务器，均为双核心四线程设计，4MB三级缓存，支持Turbo Boost技术，且都会集成双通道DDR3内存控制器，并首次整合板载图形核心(iGFX)，还支持在集成显卡和独立显卡之间进行切换。
和Intel取消45nm Havendale、直接推出32nm Clarkdale类似，AMD在CPU+GPU二合一处理器方面也取消了45nm Shrike，取而代之以32nm Llano，计划2011年推出，比Clarkdale晚大约一年。
Westmere家族还会加入新的AES指令集，据Intel说类似45nm Penryn新增的SSE4.1，将带来七条新指令，用于数据加密、解密的加速。
32nm Westmere系列处理器正准备在俄勒冈州D1D工厂投产，临近的D1C也会在第四季度投产，而亚利桑那州Fab 32和新墨西哥州Fab 11X将在2010年跟进。 Intel已经计划为此投资70亿美元之多。
根据Intel介绍，32nm工艺将采用第二代High-K和金属栅极晶体管技术，九个金属铜和Low-K互联层，其中的关键层会在Intel历史上首次应用沉浸式光刻技术(AMD 45nm已使用)，无铅无卤素，核心面积可比45nm减小大约70%。
Westmere
一代处理器——Westmere 与 Sandy Bridge 在英特尔信息技术峰会的主题演讲中，马宏升演示了一个基于 Westmere 的电脑，在诸如打开多窗口同时上网冲浪等简单的日常任务中，它显示出了响应速度的显著提升。
而且，Westmere 是英特尔的第一款 32 纳米处理器，具有历史性意义，因为这款英特尔处理器首次把图形芯片整合到处理器封装中。除了支持英特尔®睿频加速技术（Turbo Boost）和英特尔®超线程技术，Westmere 增加了新的高级加密标准（Advanced Encryption Standard, AES）指令，以便实现更快速的加密和解密。 Westmere 已经按计划进入晶圆生产阶段，计划在今年第四季度开始批量生产。
32 纳米Westmere晶圆。 jpg
Sandy Bridge
在 Westmere 之后，英特尔将继续进行研发代号为“Sandy Bridge”的32纳米处理器芯片整合。 Sandy Bridge 在同一芯片或作为处理器内核的硅片上，集成了英特尔的第六代图形内核，并将用于浮点计算、视频计算以及多媒体应用中常见的处理密集型软件的加速。马宏升展示了一款运行多个视频和三维软件的基于 Sandy Bridge 的系统，这个在很久以后才会面世的产品系列，在早期开发阶段已经能够良好地运行。
马宏升演示了基于“Larrabee”架构的芯片雏形。 Larrabee 是未来以图形为中心的协处理器系列产品的研发代号。他还确认，主要的开发人员已经拿到了开发系统。
首款 Larrabee 产品计划在明年上市，它借助英特尔架构的可编程能力，并将大幅提升其并行处理能力。灵活的可编程能力以及充分利用现有开发人员、软件和设计工具的能力，让程序员可以自由地实现完全可编程渲染，从而轻松地实现光栅化、体积光或光线跟踪渲染等各种三维图形处理功能。
通过采用这款产品的英特尔电脑，用户将能够获得震撼人心的可视化体验。马宏升还演示了热门游戏《雷神战争》（Quake Wars: Enemy Territory）的实时光线跟踪版，它运行在 Larrabee 图形内核和研发代号为“Gulftown”仍沿用酷睿品牌的英特尔下一代发烧级游戏处理器上。 Larrabee 芯片最初将出现在独立显卡中，在更远的将来，Larrabee 架构将最终与其他技术一起整合到处理器中去。
马宏升还和与会者一起预览了研发代号为“Westmere-EP”的英特尔下一代智能服务器处理器，并介绍了英特尔对使用至强和安腾处理器的高端服务器市场的承诺。马宏升探讨了即将推出的“Nehalem-EX”服务器处理器空前的性能提升，这种提升甚至比目前英特尔®至强® 5500 系列处理器较英特尔前一代芯片的性能提升更为显著。
马宏升也描述了计算、网络与存储在数据中心的融合，分享了以英特尔 10GbE 解决方案引领的融合数据中心 IO 架构的远景看法。英特尔还与其它行业领袖进行了一系列合作，提供优化的平台、系统、技术和解决方案来应对互联网和云服务趋势下的“超大规模”数据中心环境。
马宏升还披露了散热设计功耗（Thermal Design Power, TDP）仅为 30 瓦的全新超低电压英特尔®至强® 3000 系列处理器。作为各种高密度的功率优化平台产品的补充，英特尔还首次公开演示了单路“微服务器”（micro server）参考系统，这有助于微服务器的创新和未来标准的制定。
作为把英特尔备受欢迎的 Nehalem 微架构扩展到新市场的一个例证，马宏升还介绍了日前刚刚披露的“Jasper Forest”系列嵌入式处理器。这款处理器将于明年早些时候上市，专为存储、通信、军事和航空应用而设计，提供更高水平的集成，为这些高密度计算环境节约宝贵的板卡空间和能耗。
最后，马宏升宣布了一款使用英特尔®博锐?（vPro）技术的全新电脑管理工具。键盘视频鼠标（Keyboard Video Mouse, KVM）远程控制技术，让 IT人员能够在用户发现问题时进行精准的调查，从而加快诊断速度，减少 IT 人员到访现场次数，并节约成本。