Úvod
Notlongago,AlteraofficiallylaunchedtheNiosIIseriesof32-bitRISCembeddedprocessors.TheNiosIIseriesofsoft-coreprocessorsareAltera'ssecond-generationFPGAembeddedprocessors.Itsperformanceexceeds200DMIPS,anditonlycosts35centstoimplementinAlteraFPGAs.Altera'sStratix,StratixGX,StratixII,andCycloneseriesFPGAsfullysupportNiosIIprocessors,andfutureFPGAdeviceswillalsosupportNiosII.
SinceAlteralaunchedthefirst16-bitNiosprocessorin2000,ithasdeliveredmorethan13,000Niosdevelopmentkits,andNioshasbecomethemostpopularsoft-coreprocessor.ThenewlylaunchedNiosIIseriesadoptsabrand-newarchitectureandhasahigherlevelofefficiencyandperformancethanthefirst-generationNios.Comparedwiththefirstgeneration,theNiosIIcoreoccupieslessthan50%ofFPGAresourcesonaverage,andthecomputingperformancehasdoubled.
Řada NiosII zahrnuje 3 produkty, jmenovitě:NiosII/f(rychlý)-nejvyšší systémový výkon,střední využití FPGA;NiosII/s(standardní)-vysoký výkon,nízké FPGApoužití;NiosII/e(ekonomický)-nízký výkon,nejnižší využití FPGA.Tyto3produktyvyužívajízákladníkonstrukční-datové-jednotky-3-3-3bitové procesorové jednotky, 23bitové-procesorové jednotky -bitové obecné-registry a 32 externích zdrojů přerušení; pomocí stejné architektury instrukcí (ISA), 100% kompatibilní s binárním kódem, mohou návrháři změnit CPU podle změn systémových požadavků a vybrat nejlepší řešení, které odpovídá výkonu a nákladům, aniž by ovlivnilo investice do stávajícího softwaru.
Inparticular,theNiosIIseriessupportstheuseofdedicatedcommands.Thededicatedinstructionisahardwaremoduleaddedbytheuser,whichaddsanarithmeticlogicunit(ALU).Userscancreateupto256dedicatedinstructionsforeachNiosIIprocessorusedinthesystem,whichallowsdesignerstofine-tunethesystemhardwaretomeetperformancegoals.ThededicatedinstructionlogicisthesameastheNiosIIinstructionitself.Itcanfetchvaluesfromuptotwosourceregistersandoptionallywritetheresultbacktothetargetregister.Atthesametime,theNiosIIseriessupportsmorethan60peripheraloptions.Developerscanchoosetherightperipheralsandgetthemostsuitablecombinationofprocessors,peripheralsandinterfaceswithouthavingtopayforsiliconfunctionsthatarenotusedatall.
TheNiosIIseriescanmeettheneedsofanyapplicationof32-bitembeddedmicroprocessors.Customerscantransplantthefirst-generationNiosprocessordesigntoacertainNiosIIprocessor.AlterawillsupportexistingFPGAsforalongtime.Thefirst-generationNiosprocessorintheseries.Inaddition,Alteraprovidesaone-clickmigrationoptionthatcanbeupgradedtotheNiosIIseries.NiosIIprocessorscanalsobeimplementedinHardCopydevices,andAlteraalsoprovidesASICtransplantationforsystemsbasedonNiosIIprocessors.
TheNiosIIprocessorhasacompletesoftwaredevelopmentkit,includingacompiler,integrateddevelopmentenvironment(IDE),JTAGdebugger,real-timeoperatingsystem(RTOS)andTCP/IPprotocolstack.ThedesignercanusetheSOPCBuildersystemdevelopmenttoolintheAlteraQuartusIIdevelopmentsoftwaretoeasilycreateadedicatedprocessorsystem,andcanaddthenumberofNiosIIprocessorcoresaccordingtotheneedsofthesystem.
TheNiosIIsoftwaredevelopmenttoolcanbeusedtobuildsoftwarefortheNiosIIsystem,thatis,one-clickautomaticgenerationofadedicatedC/C++operatingenvironmentsuitableforsystemhardware.NiosIIintegrateddevelopmentenvironment(IDE)providesmanysoftwaretemplatestosimplifyprojectsettings.Inaddition,theNiosIIdevelopmentkitincludestwothird-partyreal-timeoperatingsystems(RTOS)-MicroC/OS-II(Micrium),NucleusPlus(ATI/Mentor)andTCP/IPprotocolstackfornetworkapplications.
Foralongtime,thereasonwhyAlterahasbeenpursuingtheembeddedprocessorstrategyisthatastheapplicationofASICdevelopmentisincreasinglytroubledbycosts,OEMsareincreasinglyturningtoFPGAstobuildtheirownsystems.Mostofthesesystemsrequireaprocessor,andAlteraprovidesdesignerswithflexibleembeddedprocessorsolutionsoptimizedforFPGAsthatcanmeettheneedsofthe16-bitand32-bitembeddedprocessormarket.Itisestimatedthatby2007,themarketvaluewillreach11billionUSdollars.
Theadvantageofusingsoft-coreprocessorsinFPGAsoverhard-coresisthathard-coreimplementationshavenoflexibilityandusuallycannotusethelatesttechnology.Asthesystembecomesmoreadvanced,solutionsbasedonstandardprocessorswillbeeliminated,whilesolutionsbasedonNiosIIprocessorsareconstructedbasedonHDLsourcecode,whichcanbemodifiedtomeetnewsystemrequirementsandavoidthefateofbeingeliminated.ByimplementingtheprocessorasanHDLIPcore,developerscanfullycustomizetheCPUandperipheralstoobtainaprocessorthatjustmeetstheneeds.
Funkce
TheNios®IIseriesofembeddedprocessorsarespeciallyoptimizedfortheintegratedapplicationsofAltera®FPGAsandProgrammableSystem-on-Chip(SOPC).Table1detailsthecharacteristicsoftheNiosIIsoft-coreembeddedprocessorseries.Formoregeneralinformation,pleaserefertotheNiosIIintroductionpage.
Tabulka1.Funkce vestavěných procesorů NiosII
Popis funkce
Designprocessandtools
DetailsofhardwaredevelopmenttoolsonthispageListedthedevelopmenttoolsusedtobuildtheNiosIIprocessorhardwaresystem.
SoftwaredevelopmenttoolsThispageprovidesinformationabouttheNiosIIintegrateddevelopmentenvironment(IDE),whichisanintegrateddevelopmentenvironmentwidelyusedbydevelopers,includingediting,compiling,anddebuggingapplicationsoftware..
DevelopmentkitAlteraanditspartnersprovidealargenumberofdevelopmentboardkitsthatusetheNiosIIseriesofembeddedprocessors.
System-leveldesignflowAltera’sSOPCBuildertoolprovidestheabilitytoquicklybuildSOPCsystems.ThisarchitecturecanincludeoneorseveralCPUs,providememoryinterfaces,peripheraldevices,andsysteminterconnectionlogic.system.
Architektura a vlastnosti
NiosIIprocessorcoreNiosIIprocessorseriesconsistsofthreedifferentcores,whichcanflexiblycontrolcostandperformance,thushavingawiderangeofapplications.
JTAGdebuggingmoduleTheJTAGdebuggingmoduleprovidestheon-chipcontrol,debuggingandcommunicationfunctionsoftheNiosIIprocessorthrougharemotePChost.ThisisaverycompetitivefeatureoftheNiosIIprocessor.
UserinstructionsDeveloperscanaddhardwaretotheNiosIICPUcoretoperformcomplexcomputingtasksandprovideaccelerationalgorithmsforsoftwarewithtighttimingrequirements.
PeripheralsandinterfacesTheNiosIIdevelopmentkitincludesasetofstandardperipheralequipmentlibraries,whichcanbeusedfreeofchargeinAltera'sFPGA.
Avalon™SwitchedBusTheAvalonSwitchedBusimplementsnetworkconnectionsbetweenprocessors,peripherals,andinterfacecircuits,andprovideshigh-bandwidthdatapaths,multiplechannels,andreal-timeprocessingcapabilities.AvalonswitchingbuscanbeautomaticallygeneratedbycallingSOPCBuilderdesignsoftware.
Designresources
NiosIIprocessorsupportNiosIIprocessorsupportpageprovidesavarietyofinformationhelpfultoNiosIIdesigners,includinglicenses,downloads,andreferencedesigns,Documentation,onlinedisplayandcommonproblems.
EmbeddedProcessorSolutionCenterTheEmbeddedProcessorSolutionCenterprovidesalotofinformationtohelpdevelopersimplementsystemdesignsusingAltera'sembeddedprocessors.Theavailableinformationincludesdevicesupport,softwaredevelopmenttools,peripheralequipmentandinterfaces,training,technicalsupportandmaterials.
NiosrenewalinformationTheNiosIIdevelopmentkitincludesaone-yearupgradelicensefortheCPU,peripherals,andembeddedsoftwaredevelopmenttools.(ThisdoesnotincludeQuartus®IIsoftwareupgrades.)CustomerscanorderadditionalinformationincludingNiosIIprocessorupgradeseachyearthroughtheNiosrenewalprogram.
NiosIIEmbeddedProcessorQuestionsandAnswersPageThispageprovidesfrequentlyaskedquestionsandanswersaboutAlteraNiosIIseriesembeddedprocessors.
TheexcellentcharacteristicsofStratix®IIdevicesandNiosIIprocessorseriesStratixIIdevicestructurecombinedwithNiosIIembeddedprocessorseriesprovideunparalleledprocessingcapabilitiestomeettheneedsofnetwork,communication,datasignalprocessing(DSP)application,massstorageandotherhighbandwidthsystemapplicationrequirements.
ThecombinationoftheexcellentfeaturesofStratixdevicesandNiosIIprocessorseriesStratixFPGAstructureandNiosIIembeddedprocessorprovideshighprocessingpowertomeettheneedsofhigh-bandwidthsystemapplications.
Cyclone™devicesandNiosIIprocessorseriesuseNiosIIembeddedprocessorseriesinCyclonedevices,reducingcosts,increasingflexibility,andprovidinglow-costdiscretemicroprocessorsinprice-sensitiveapplicationenvironmentsThedeviceprovidesanidealsubstitute.