Integrated circuit


Integrated circuit, English is Integrated Circuit, abbreviated as IC; as the name implies, a certain number of commonly used electronic components, such as resistors, capacitors, transistors, etc., and between these components The wiring is a circuit with a specific function integrated through a semiconductor process.

Why are integrated circuits produced? We know that there is a driving force behind any invention, and the driving force often comes from problems. So what were the problems before the production of integrated circuits? Let’s take a look at the world’s first electronic computer, which was born in the United States in 1946. It is a behemoth that covers an area of ​​150 square meters and weighs 30 tons. The circuit inside uses 17,468 tubes, 7,200 resistors, 10,000 capacitors, 500 thousand lines, power consumption 150 kilowatts. Obviously, large occupied area and inability to move are the most intuitive and prominent problems; if these electronic components and connections can be integrated on a small carrier, how great would it be! We believe that many people have thought about this issue and put forward various ideas. A typical example is Dammer, a scientist from the British Radar Research Institute. He proposed at a meeting in 1952: The discrete components in the electronic circuit can be concentrated on a semiconductor chip, and a small chip is a complete circuit. As a result, the volume of the electronic circuit can be greatly reduced, and the reliability is greatly improved. This was the idea of ​​the initial integrated circuit. The invention of the transistor made this idea possible. In 1947, the first transistor was manufactured in Bell Labs in the United States. Before that, the current amplification function could only rely on large size and power consumption. A tube with a large amount of electricity and a fragile structure. The transistor has the main function of the electronic tube and overcomes the above-mentioned shortcomings of the electronic tube. Therefore, after the invention of the transistor, the idea of ​​a semiconductor-based integrated circuit soon appeared, and the integrated circuit was invented soon. Jack Kilby and Robert Noyce invented germanium integrated circuits and silicon integrated circuits between 1958 and 1959, respectively.

Now, integrated circuits have played a very important role in all walks of life and are the cornerstone of the modern information society. The meaning of integrated circuits has far exceeded the scope of its definition when it was first born, but its core part has not changed, that is "integration", and the various disciplines derived from it are mostly centered on "integration". The three issues of "what", "how to integrate", and "how to deal with the pros and cons of integration". Silicon integrated circuits are the mainstream, that is, all the various components needed to realize a certain function of the circuit are placed on a silicon chip, and the whole formed is called an integrated circuit. For "integration", it may be easier to understand the house we have lived in: many people have lived in rural houses when they were young. At that time, the main body of the house may be three or two bungalows, playing the function of a bedroom, with a small courtyard at the entrance. A pair of tables and chairs serves as a living room, and there is a small smoke-cooking low house next to it. It is a kitchen, and a toilet with a unique function needs to be isolated to a certain extent. It may be more than ten meters behind the house. ...Later, in cities, or rural urbanization, everyone moved into buildings or suites. In a suite, there are living rooms, bedrooms, kitchens, bathrooms, and balconies. It may only be tens of square meters, but it has the original land area. The various functions of rural houses of several hundred square meters are integration.

Of course, today’s integrated circuits are far more integrated than a suite. Perhaps a modern building can be used as a better analogy: there are shops, offices, canteens, and hotel-style apartments on the ground. There are several underground floors with parking lots, and there is a foundation under the parking lot. This is the layout of integrated circuits. The analog circuit is separated from the digital circuit. The sensitive circuit that handles small signals is separated from the control logic that frequently flips. The power supply is placed in a corner. The layout of the rooms on each floor is different, and the corridors are also different. There are back-shaped, I-shaped, and several-shaped—this is the design of integrated circuit devices, and low-noise circuits can use folded shapes or "interdigital" structures. Transistor to reduce junction area and gate resistance. Each floor is directly accessible by high-speed elevators. For efficiency and functional isolation, there may be multiple elevators. The floors that each elevator can reach are different-this is the wiring of integrated circuits. The power and ground wires are routed separately and the load is heavy. The line is also wide; the clock and the signal are separated; the wiring between each layer is vertical to avoid interference; the high-speed bus between the CPU and the storage is equivalent to the elevator, and the through holes between the floors are equivalent to the elevator car...

< h2> Features

Integrated circuits or microcircuits, microchips, chips are a kind of circuit in electronics (mainly including semiconductor devices, but also passive components, etc.) ) It is miniaturized and usually manufactured on the surface of a semiconductor wafer.

The aforementioned integrated circuits that manufacture circuits on the surface of semiconductor chips are also called thin-film integrated circuits. Another type of thick-film hybrid integrated circuit (hybrid integrated circuit) is a miniaturized circuit composed of independent semiconductor devices and passive components integrated into a substrate or circuit board.

This article is about monolithic integrated circuits, that is, thin film integrated circuits.

Integrated circuits have the advantages of small size, light weight, fewer lead wires and soldering points, long life, high reliability, and good performance. At the same time, they have low cost and are convenient for mass production. It is not only widely used in industrial and civilian electronic equipment such as tape recorders, televisions, computers, etc., but also in military, communications, and remote control. The use of integrated circuits to assemble electronic equipment can increase the assembly density by tens to thousands of times compared with transistors, and the stable working time of the equipment can also be greatly improved.


Functional structure

Integrated circuits, also known as ICs, can be divided into analog integrated circuits and digital integrated circuits according to their functions and structures. And the three major categories of digital/analog hybrid integrated circuits.

Analog integrated circuits, also known as linear circuits, are used to generate, amplify and process various analog signals (referring to signals whose amplitude changes with time. For example, audio signals of semiconductor radios, tape signals of VCRs, etc.), The input signal is proportional to the output signal. The digital integrated circuit is used to generate, amplify and process various digital signals (referring to signals with discrete values ​​in time and amplitude. For example, 5G mobile phones, digital cameras, computer CPUs, digital TV logic control and playback audio signals And video signal).

Manufacturing process

Integrated circuits can be divided into semiconductor integrated circuits and film integrated circuits according to the manufacturing process.

Film integrated circuits are classified into thick film integrated circuits and thin film integrated circuits.

Level of integration

Integrated circuits can be divided into different levels of integration:

SSIC Small Scale Integrated circuits

MSIC Medium Scale Integrated Circuits (Medium Scale Integrated Circuits)

LSIC Large Scale Integrated Circuits (Large Scale Integrated Circuits)

VLSIC Very Large Scale Integrated Circuits (Very Large Scale Integrated Circuits) circuits)

ULSIC ultra large scale integrated circuits (Ultra Large Scale Integrated circuits)

GSIC huge scale integrated circuits are also called very large scale integrated circuits or very large scale integrated circuits (Giga Scale Integration).

Different conductivity types

Integrated circuits can be divided into bipolar integrated circuits and unipolar integrated circuits according to their conductivity types. They are all digital integrated circuits.

The manufacturing process of bipolar integrated circuits is complicated, and the power consumption is relatively large, which means that the integrated circuits have TTL, ECL, HTL, LST-TL, STTL and other types. Unipolar integrated circuits have simple manufacturing processes, low power consumption, and are easy to make large-scale integrated circuits. Representative integrated circuits include CMOS, NMOS, PMOS, and other types.

By application

According to the application, integrated circuits can be divided into integrated circuits for televisions, integrated circuits for audio, integrated circuits for video players, integrated circuits for video recorders, and computers (microcomputers). Integrated circuits, integrated circuits for electronic keyboards, integrated circuits for communications, integrated circuits for cameras, integrated circuits for remote control, integrated circuits for language, integrated circuits for alarms, and various application-specific integrated circuits.

1. TV integrated circuits include line and field scanning integrated circuits, intermediate amplifier integrated circuits, sound integrated circuits, color decoding integrated circuits, AV/TV conversion integrated circuits, switching power supply integrated circuits, and remote control integrated circuits Circuits, Nicam decoding integrated circuits, picture-in-picture processing integrated circuits, microprocessor (CPU) integrated circuits, memory integrated circuits, etc.

2. Audio integrated circuits include AM/FM high-intermediate frequency circuits, stereo decoding circuits, audio preamplifier circuits, audio operational amplifier integrated circuits, audio power amplifier integrated circuits, surround sound processing integrated circuits, electronics Level drive integrated circuit, electronic volume control integrated circuit, delay reverberation integrated circuit, electronic switch integrated circuit, etc.

3. Integrated circuits for DVD players include system control integrated circuits, video encoding integrated circuits, MPEG decoding integrated circuits, audio signal processing integrated circuits, sound effect integrated circuits, RF signal processing integrated circuits, and digital signal processing Integrated circuits, servo integrated circuits, motor drive integrated circuits, etc.

4. Integrated circuits for video recorders include system control integrated circuits, servo integrated circuits, drive integrated circuits, audio processing integrated circuits, and video processing integrated circuits.

5. Computer integrated circuits, including central control unit (CPU), internal memory, external memory, I/O control circuit, etc.

6. Communication integrated circuit

7. Professional control integrated circuit

Classified by application field

Integrated circuit can be classified by application field It is a standard general-purpose integrated circuit and an application-specific integrated circuit.

According to the shape

According to the shape, the integrated circuit can be divided into round (metal case transistor package type, generally suitable for high power), flat type (good stability, small size) ) And dual in-line type.

A brief history

The history of the development of integrated circuits in the world

1947: John Barding, Bratton, and Shockley of Bell Labs in the United States The invention of the transistor is the first milestone in the development of microelectronics technology;

1950: the birth of the junction transistor

1950: R Ohl and Shockley invented ion implantation Process

1951: Field-effect transistor invention

1956: CS Fuller invented the diffusion process

1958: Fairchild Robert Noyce and Texas Instruments Kilby invented the integrated circuit separately within a few months, creating the history of the world's microelectronics;

1960: HH Loor and E Castellani invented the photolithography process

1962 : American RCA company developed MOS field effect transistors

1963: FMWanlass and CTSah first proposed CMOS technology. Today, more than 95% of integrated circuit chips are based on CMOS technology

1964: Intel Moore proposed Moore's Law, predicting that transistor integration will double every 18 months

1966: American RCA company developed CMOS integrated circuits and developed the first gate array (50 gates), which laid a solid foundation for the development of large-scale integrated circuits today. It is a milestone.

1967: Applied Materials was established, and it has become the world’s largest semiconductor equipment manufacturer Company

1971: Intel launched 1kb dynamic random access memory (DRAM), marking the emergence of large-scale integrated circuits

1971: The world’s first microprocessor 4004 was launched by Intel , Using MOS technology, this is a milestone invention

1974: RCA company launched the first CMOS microprocessor 1802

1976: 16kb DRAM and 4kb SRAM Coming out

1978: 64kb dynamic random access memory was born, 140,000 transistors were integrated on a silicon chip less than 0.5 square centimeters, marking the coming of the very large-scale integrated circuit (VLSI) era

1979: Intel launched the 5MHz 8088 microprocessor. After that, IBM launched the world's first PC based on the 8088

1981: 256kb DRAM and 64kb CMOS SRAM came out

1984: Japan announced the launch of 1Mb DRAM and 256kb SRAM

1985: 80386 microprocessor came out, 20MHz

1988: 16M DRAM came out, with 35 million transistors integrated on a silicon chip measuring 1 square centimeter, marking the entry of very large scale integrated circuit (VLSI) stage

1989: 1Mb DRAM entered the market

1989: 486 microprocessor was launched, 25MHz, 1μm process, and later 50MHz chip adopted 0.8μm process

1992: 64M-bit random access memory came out

1993: 66MHz Pentium processor was launched, using 0.6μm process

1995: Pentium Pro, 133MHz, using 0.6-0.35μm process; 1997: 300MHz Pentium II came out, using 0.25μm process

1999: Pentium III came out, 450MHz, using 0.25μm process, later using 0.18μm process

2000: 1Gb RAM was put on the market

2000: Pentium 4 came out, 1.5GHz , Using 0.18μm process

2001: Intel announced the use of 0.13μm process in the second half of 2001.

2003: Pentium 4 E series was launched, using 90nm process.

2005: Intel Core 2 series was launched, using 65nm process.

2007: Intel Core 2 E7/E8/E9 based on the new 45nm High-K process was launched.

2009: The Intel Core i series was newly launched, using a record-breaking 32-nanometer process, and the next-generation 22-nanometer process is under development.

The history of China's integrated circuit development

China's integrated circuit industry was born in the 1960s and has gone through three stages of development:

1965-1978: With the goal of computer and military equipment as the goal, with the development of logic circuits as the main product, the initial establishment of the integrated circuit industry foundation and the supporting conditions for related equipment, instruments and materials

1978-1990: Mainly imported second-hand equipment from the United States , To improve the level of integrated circuit equipment, while "controlling chaos" and focusing on consumer products as a supporting point, it solved the localization of color TV integrated circuits.

1990-2000: Focusing on Project 908 and Project 909, with CAD as a breakthrough, we will do a good job in scientific and technological research and the construction of the northern scientific research and development base to serve the information industry, and the integrated circuit industry has made new developments.

The integrated circuit industry is an overall description of the market sales of each link in the integrated circuit industry chain. It includes not only the integrated circuit market, but also the IP core market, the EDA market, the chip foundry market, and the packaging and testing market. , And even extend to the equipment and material markets.

The integrated circuit industry no longer relies on the development of single devices such as CPU and memory. Mobile internet, triple play, multi-screen interaction, and smart terminals have brought multiple market spaces. The continuous innovation of business models has injected new vitality into the market. . At present, my country's integrated circuit industry has a certain foundation. Over the years, my country's integrated circuit industry has gathered technological innovation vitality, market expansion capabilities, resource integration power and broad market potential, which will help the industry achieve rapid development and progress in the next 5 to 10 years. A new step laid the foundation.

Common sense of testing

1. Before testing, you must understand the working principle of integrated circuits and related circuits.

Before checking and repairing integrated circuits, you must first be familiar with the integrated circuits used. The function, internal circuit, main electrical parameters, the role of each pin and the working principle of the circuit composed of the normal voltage, waveform and peripheral components of the pin.

2. Test to avoid short circuit between pins

When measuring voltage or testing waveform with oscilloscope probe, avoid short circuit between pins, preferably on the periphery directly connected to the pins. Measurements are made on the printed circuit. Any momentary short circuit can easily damage the integrated circuit, especially when testing flat-package CMOS integrated circuits.

3. It is strictly forbidden to use grounded test equipment to touch the live TV, audio, video and other equipment on the bottom plate without an isolation transformer.

It is strictly forbidden to use instruments with grounded shells The equipment directly tests TV, audio, video and other equipment without power isolation transformer. Although the general radio cassette recorder has a power transformer, when you come into contact with more special TV or audio equipment, especially the output power or the nature of the power supply used, you must first find out whether the chassis of the machine is charged, otherwise it will be very easy The TV, audio and other equipment that are charged with the backplane cause a short circuit of the power supply, which affects the integrated circuit, causing further expansion of the fault.

4. Pay attention to the insulation performance of the electric soldering iron

It is not allowed to use the soldering iron when it is live. Make sure that the soldering iron is not live. It is best to ground the shell of the soldering iron, and be more careful with the MOS circuit. , It is safer to use 6~8V low voltage electric soldering iron.

5. We must ensure the quality of welding

When welding, the welding is sure, and the accumulation of solder and pores are easy to cause false welding. The soldering time is generally no more than 3 seconds, and the power of the soldering iron should be about 25W with internal heating. The integrated circuit that has been soldered should be carefully checked. It is best to use an ohmmeter to measure whether there is a short circuit between the pins, confirm that there is no solder adhesion, and then turn on the power.

6. Do not judge the damage of the integrated circuit easily

Do not judge the damage of the integrated circuit easily. Because most integrated circuits are directly coupled, once a circuit is abnormal, it may cause multiple voltage changes, and these changes are not necessarily caused by the damage of the integrated circuit. In addition, in some cases, the measured voltage of each pin is different from the normal voltage. When the values ​​match or are close, it does not always mean that the integrated circuit is good. Because some soft faults will not cause changes in DC voltage.

7. The internal resistance of the test instrument should be large

When measuring the DC voltage of the integrated circuit pin, a multimeter with the internal resistance of the meter head greater than 20KΩ/V should be selected, otherwise it will be affected by some pins. The voltage will have a large measurement error.

8. Pay attention to the heat dissipation of the power integrated circuit

The power integrated circuit should have good heat dissipation, and it is not allowed to work in a high-power state without a heat sink.

9. Leads should be reasonable

If you need to add external components to replace the damaged part of the integrated circuit, small components should be used, and the wiring should be reasonable to avoid unnecessary parasitic coupling , Especially to deal with the grounding terminal between the audio power amplifier integrated circuit and the pre-amplifier circuit.

The meaning of each part of the integrated circuit model

Part 0

Part 1

Part 2

Part 3

Part IV











C means

< p>Made in China


TTL circuit

Use a digital meter

Show the device's serial code




Multilayer ceramic flat


HTL circuit




plastic flat


ECL circuit




Black porcelain flat


CMOS circuit




More Layer ceramic dual in-line






Black porcelain dual in-line plug


Microcomputer circuit


‐55~125 ℃


Plastic dual in-line


Linear amplifier


Plastic single in-line plug




Metal diamond

B< /p>

Non-linear circuit


Metal circle


Interface circuit


Ceramic chip carrier


A/D converter


Plastic chip carrier


D/A converter


Network pin grid display


Audio, TV circuit


Communication dedicated circuit


Sensitive circuit


Watch circuit

For example: Schottky 4-input NAND gate CT54S20MD

C—Conform to national standards

T—TTL Circuit

54S20—Schottky dual 4-input NAND gate


D—Multilayer ceramic dual in-line package

1, BGA

(ball grid array)

Ball contact array, one of surface mount packages. On the back of the printed substrate, an array of spherical bumps is made to replace the pins, and the LSI chip is assembled on the front of the printed substrate, and then sealed by molding resin or potting. Also called bump array carrier (PAC). Pins can exceed 200, which is a package for multi-pin LSI. The package body can also be made smaller than QFP (Quad Flat Package). For example, a 360-pin BGA with a pin center distance of 1.5mm is only 31mm square; while a 304-pin QFP with a pin center distance of 0.5mm is 40mm square. And BGA does not have to worry about pin deformation problems like QFP (see the picture shown).


(quad flat package with bumper)

Quad flat package with bumper. In one of the QFP packages, protrusions (buffer pads) are provided at the four corners of the package body to prevent bending and deformation of the pins during transportation. American semiconductor manufacturers mainly use this package in circuits such as microprocessors and ASICs. The pin center distance is 0.635mm, and the pin number is about 84 to 196 (see QFP).

3, C-


represents the mark of ceramic package. For example, CDIP stands for ceramic DIP. It is a mark that is often used in practice.

4, Cerdip

Ceramic dual in-line package sealed with glass, used for ECL RAM, DSP (digital signal processor) and other circuits. Cerdip with glass window is used for ultraviolet erasable EPROM and microcomputer circuits with EPROM inside. The pin center distance is 2.54mm, and the number of pins is from 8 to 42. In Japan, this package is expressed as DIP-G (G means glass seal).

5. Cerquad

One of the surface mount packages, that is, a ceramic QFP sealed underneath, which is used to package logic LSI circuits such as DSP. Cerquad with windows is used to encapsulate EPROM circuits. The heat dissipation is better than that of plastic QFP, and it can tolerate 1.5~2W power under natural air cooling conditions. But the packaging cost is 3 to 5 times higher than that of plastic QFP. The center distance of the pins has a variety of specifications such as 1.27mm, 0.8mm, 0.65mm, 0.5mm, 0.4mm and so on. The number of pins ranges from 32 to 368.

Ceramic chip carrier with pins, one of the surface mount packages, the pins are led out from the four sides of the package in a T-shape. It is used to encapsulate the ultraviolet erasable EPROM and the microcomputer circuit with EPROM with windows. This package is also called QFJ, QFJ-G (see QFJ).

6, COB

(chip on board)

Chip on board packaging is one of the bare chip mounting technologies. On the circuit board, the electrical connection between the chip and the substrate is realized by a wire stitching method, and the electrical connection between the chip and the substrate is realized by a wire stitching method, and is covered with resin to ensure reliability. Although COB is the simplest bare chip mounting technology, its packaging density is far inferior to TAB and flip-chip bonding technology.

7, DFP

(dual flat package)

Dual flat package. It is another name for SOP (see SOP). It used to be called this before, but it was basically not used in the late 1980s.

8, DIC

(dual in-line ceramic package)

Another name for ceramic DIP (including glass seal) (see DIP).

9, DIL

(dual in-line)

Another name for DIP (see DIP). European semiconductor manufacturers often use this name.

10, DIP

(dual in-line package)

Dual in-line package. One of the plug-in packages, the pins are drawn from both sides of the package, and the package materials are plastic and ceramic. DIP is the most popular plug-in package, and its application range includes standard logic ICs, memory LSIs, and microcomputer circuits. The pin center distance is 2.54mm, and the number of pins is from 6 to 64. The package width is usually 15.2mm. Some packages with a width of 7.52mm and 10.16mm are called skinny DIP and slim DIP (narrow DIP) respectively. But in most cases, no distinction is made, and they are simply collectively referred to as DIP. In addition, ceramic DIP sealed with low-melting glass is also called cerdip (see cerdip).

11, DSO

(dual small out-lint)

Dual small out-lint package. Another name for SOP (see SOP). Some semiconductor manufacturers use this name.

12, DICP

(dual tape carrier package)

Double-sided lead carrier package. One of TCP (Tape Carrier Package). The pins are made on the insulating tape and lead out from both sides of the package. Due to the use of TAB (automatic tape load welding) technology, the package outline is very thin. It is often used in liquid crystal display driver LSI, but most of them are custom products. In addition, the 0.5mm thick memory LSI book package is in the development stage. In Japan, DICP is named DTP in accordance with EIAJ (Electronic and Mechanical Industries of Japan) Association standards.

13, DIP

(dual tape carrier package)

Ibid. The Japanese Electronic Machinery Industry Association standard names DTCP (see DTCP).

14, FP

(flat package)

Flat package. One of surface mount packages. Another name for QFP or SOP (see QFP and SOP). Some semiconductor manufacturers use this name.

15, flip-chip

Flip-chip welding. One of the bare chip packaging technologies is to make metal bumps in the electrode area of ​​the LSI chip, and then connect the metal bumps with the electrode area on the printed circuit board. The footprint of the package is basically the same as the chip size. It is the smallest and thinnest of all packaging technologies. However, if the thermal expansion coefficient of the substrate is different from that of the LSI chip, a reaction will occur at the joint, which will affect the reliability of the connection. Therefore, it is necessary to use resin to reinforce the LSI chip, and use a substrate material with substantially the same thermal expansion coefficient.

16, FQFP

(fine pitch quad flat package)

Small pin center distance QFP. Usually refers to a QFP with a lead center distance less than 0.65mm (see QFP). Some conductor manufacturers use this name.

17, CPAC

(globe top pad array carrier)

The American Motorola company's nickname for BGA (see BGA).

18, CQFP

(quad fiat package with guard ring)

Four-side pin flat package with guard ring. One of the plastic QFPs, the pins are masked with a resin protection ring to prevent bending and deformation. Before assembling the LSI on the printed circuit board, cut the lead from the guard ring and make it into a seagull wing shape (L shape). This package has been mass-produced by Motorola in the United States. The pin center distance is 0.5mm, and the number of pins is about 208 at most.

19, H-

(with heat sink)

means a mark with a heat sink. For example, HSOP means SOP with heat sink.

20, pin grid array

(surface mount type)

Surface mount PGA. Usually PGA is a plug-in package with a pin length of about 3.4mm. The surface mount PGA has display-like pins on the bottom surface of the package, and the length ranges from 1.5mm to 2.0mm. Mounting uses the method of butt welding with the printed circuit board, so it is also called butt welding PGA. Because the pin center distance is only 1.27mm, which is half smaller than the plug-in type PGA, the package body can be made not so large, and the number of pins is more than that of the plug-in type (250~528), which is a package for large-scale logic LSIs. . The packaging substrates include multilayer ceramic substrates and glass epoxy resin printing bases. The packaging of multilayer ceramic substrates has been put into practical use.

21, JLCC

(J-leaded chip carrier)

J-leaded chip carrier. Another name for CLCC with window and ceramic QFJ with window (see CLCC and QFJ). The name adopted by some semiconductor manufacturers.

22, LCC

(Leadless chip carrier)

Leadless chip carrier. Refers to a surface-mount package in which the four sides of the ceramic substrate are only in contact with electrodes without leads. It is a high-speed and high-frequency IC package, also called ceramic QFN or QFN-C (see QFN).

23, LGA

(land grid array)

Contact display package. That is, a package with array state electrode contacts is made on the bottom surface. Just plug in the socket when assembling. Ceramic LGAs with 227 contacts (1.27mm center distance) and 447 contacts (2.54mm center distance) have been practically used in high-speed logic LSI circuits. Compared with QFP, LGA can accommodate more input and output pins in a smaller package. In addition, since the impedance of the lead is small, it is very suitable for high-speed LSI. However, due to the complicated production and high cost of sockets, they were basically not used in the 1990s. It is expected that its demand will increase in the future.

24, LOC

(lead on chip)

lead on chip package. One of the LSI packaging technologies, a structure in which the front end of the lead frame is above the chip, and bump solder joints are made near the center of the chip, and wire stitching is used for electrical connection. Compared with the original structure where the lead frame is arranged near the side of the chip, the chip contained in the same size package is about 1mm wide.

25, LQFP

(low profile quad flat package)

Thin QFP. Refers to the QFP with a package body thickness of 1.4mm, which is the name used by the Japanese Electronic Machinery Industry according to the new QFP form factor formulated.

26, L-QUAD

One of ceramic QFP. Aluminum nitride used for packaging substrates has a thermal conductivity 7-8 times higher than that of aluminum oxide, and has better heat dissipation. The frame of the package is aluminum oxide, and the chip is sealed by potting, thereby suppressing the cost. It is a package developed for logic LSI, which can tolerate W3 power under natural air cooling conditions. 208-pin (0.5mm center distance) and 160-pin (0.65mm center distance) LSI logic packages have been developed, and mass production began in October 1993.

27, MCM

(multi-chip module)

Multi-chip module. A package in which multiple semiconductor bare chips are assembled on a wiring substrate. According to the substrate material, it can be divided into three categories: MCM-L, MCM-C and MCM-D. MCM-L is a component using a common glass epoxy multilayer printed circuit board. The wiring density is not very high and the cost is low. MCM-C uses thick film technology to form multilayer wiring, and uses ceramic (alumina or glass ceramic) as a substrate component, which is similar to a thick film hybrid IC using a multilayer ceramic substrate. There is no obvious difference between the two. The wiring density is higher than MCM-L.

MCM-D is the use of thin film technology to form multilayer wiring, with ceramic (aluminum oxide or aluminum nitride) or Si, Al as the substrate component. The wiring scheme is the highest among the three components, but the cost is also high.

28, MFP

(mini flat package)

Small flat package. Another name for plastic SOP or SSOP (see SOP and SSOP). The name adopted by some semiconductor manufacturers.

29, MQFP

(metric quad flat package)

A classification of QFP according to JEDEC (United Electronic Equipment Council) standards. Refers to the standard QFP with a lead center distance of 0.65mm and a body thickness of 3.8mm~2.0mm (see QFP).


(metal quad)

A QFP package developed by American Olin Company. Both the base plate and the cover are made of aluminum and sealed with an adhesive. Under natural air cooling conditions, power of 2.5W~2.8W can be tolerated. Japan's Shinko Electric Industry Co., Ltd. obtained a license in 1993 to start production.

31, MSP

(mini square package)

Another name for QFI (see QFI), which is often called MSP in the early stages of development. QFI is the name prescribed by the Japan Electronic Machinery Industry Association.

34, OPMAC (over molded pad array carrier)

Molded resin sealing bump display carrier. The name adopted by the American Motorola Company for molded resin sealing BGA (see BGA).

32, P-


represents the symbol of plastic package. For example, PDIP means plastic DIP.

33, PAC

(pad array carrier)

Bump display carrier, another name for BGA (see BGA).

34, PCLP

(printed circuit board leadless package)

Printed circuit board leadless package. The name adopted by Fujitsu for plastic QFN (plastic LCC) (see QFN). Introduction

There are two specifications of 0.55mm and 0.4mm for the center distance between feet.

35, PFPF

(plastic flat package)

Plastic flat package. Another name for plastic QFP (see QFP). The name adopted by some LSI manufacturers.

36, PGA

(pin grid array)

Display pin package. One of the plug-in packages, the vertical pins on the bottom surface are arranged in an array. The packaging substrates are basically multilayer ceramic substrates. In the case where the material name is not specifically indicated, most of them are ceramic PGA, which is used in high-speed large-scale logic LSI circuits. The cost is higher. The center distance between pins is usually 2.54mm, and the number of pins ranges from 64 to 447. In order to reduce costs, the packaging substrate can be replaced by a glass epoxy printed substrate. There are also plastic PGAs with 64 to 256 pins. In addition, there is a short-pin surface-mount PGA (butt-welded PGA) with a pin center distance of 1.27mm. (See surface mount PGA).

37, piggy back

Piggy back package. Refers to the ceramic package with socket, the shape is similar to DIP, QFP, QFN. It is used to evaluate the program confirmation operation when developing equipment with a microcomputer. For example, plug the EPROM into the socket for debugging. This kind of package is basically custom-made, and it is not circulated in the market.

38, PLCC

(plastic leaded chip carrier)

Plastic leaded chip carrier. One of surface mount packages. The pins are led out from the four sides of the package and are T-shaped and are made of plastic. Texas Instruments first adopted 64k-bit DRAM and 256kDRAM in the United States, and has been popularized in logic LSI, DLD (or logic device circuits) in the 1990s. The pin center distance is 1.27mm, and the number of pins ranges from 18 to 84. J The shaped pin is not easy to deform and easier to operate than QFP, but the appearance inspection after soldering is more difficult. PLCC is similar to LCC (also known as QFN). Before, the difference between the two is only that the former uses plastic and the latter uses ceramic. But now it has The appearance of J-lead packages made of ceramics and leadless packages made of plastics (marked as plastic LCC, PC LP, P-LCC, etc.) has been indistinguishable. For this reason, the Japan Electromechanical Industry Association decided in 1988 , The package with J-shaped pins drawn from four sides is called QFJ, and the package with electrode bumps on four sides is called QFN (see QFJ and QFN).

39, P-LCC< /p>

(plastic teadless chip carrier)(plastic leaded chip currier)

Sometimes it is another name for plastic QFJ, and sometimes it is another name for QFN (plastic LCC) (see QFJ and QFN). Some

LSI manufacturers use PLCC for leaded package, and P-LCC for leadless package to show the difference.

40, QFH

(quad flat high package)

四侧引脚厚体扁平封装。塑料QFP 的一种,为了防止封装本体断裂,QFP 本体制作得较厚(见QFP)。部分半导体厂家采用的名称。< /p>


(quad flat I-leaded packgac)

四侧I 形引脚扁平封装。表面贴装型封装之一。引脚从封装四个侧面引出,向下呈I 字。 也称为MSP(见MSP)。贴装与印刷基板进行碰焊连接。由于引脚无突出部分,贴装占有面积小于QFP。 日立制作所为视频模拟IC 开发并使用了这种封装。此外,日本的Motorola 公司的PLL IC 也采用了此种封装。引脚中心距1.27mm,引脚数从18 于68。

42 、QFJ

(quad flat J-leaded package)

四侧J 形引脚扁平封装。表面贴装封装之一。引脚从封装四个侧面引出,向下呈J字形。是日本电子机械工业会规定的名称。引脚中心距1.27mm。

材料有塑料和陶瓷两种。塑料QFJ 多数情况称为PLCC(见PLCC) ,用于微机、门陈列、 DRAM、ASSP、OTP 等电路。引脚数从18 至84。

陶瓷QFJ 也称为CLCC、JLCC(见CLCC)。带窗口的封装用于紫外线擦除型EPROM 以及带有EPROM 的微机芯片电路。引脚数从32 至84。


(quad flat non-leaded package)

四侧无引脚扁平封装。表面贴装型封装之一。 90年代后期多称为LCC。 QFN 是日本电子机械工业 会规定的名称。封装四侧配置有电极触点,由于无引脚,贴装占有面积比QFP 小,高度 比QFP 低。但是,当印刷基板与封装之间产生应力时,在电极接触处就不能得到缓解。因此电 极触点 难于作到QFP 的引脚那样多,一般从14 到100 左右。材料有陶瓷和塑料两种。当有LCC 标记时基本上都是陶瓷QFN。电极触点中心距1.27mm。

塑料QFN 是以玻璃环氧树脂印刷基板基材的一种低成本封装。电极触点中心距除1.27mm 外, 还有0.65mm 和0.5mm 两种。这种封装也称为塑料LCC、PCLC、P-LCC 等。


(quad flat package)

四侧引脚扁平封装。表面贴装型封装之一,引脚从四个侧面引出呈海鸥翼(L)型。基材有 陶 瓷、金属和塑料三种。从数量上看,塑料封装占绝大部分。当没有特别表示出材料时, 多数情 况为塑料QFP。塑料QFP 是最普及的多引脚LSI 封装。不仅用于微处理器,门陈列等数字 逻辑LSI 电路,而且也用于VTR 信号处理、音响信号处理等模拟LSI 电路。引脚中心距 有1.0mm、0.8mm、 0.65mm、0.5mm、0.4mm、0.3mm 等多种规格。 0.65mm 中心距规格中最多引脚数为304。

日本将引脚中心距小于0.65mm 的QFP 称为QFP(FP)。但2000年后日本电子机械工业会对QFP 的外形规格进行了重新评价。在引脚中心距上不加区别,而是根据封装本体厚度分为 QFP(2.0mm~3.6mm 厚)、LQFP(1.4mm 厚)和TQFP(1.0mm 厚)三种。

另外,有的LSI 厂家把引脚中心距为0.5mm 的QFP 专门称为收缩型QFP 或SQFP、VQFP。但有的厂家把引脚中心距为0.65mm 及0.4mm 的QFP 也称为SQFP,至使名称稍有一些混乱 。 QFP 的缺点是,当引脚中心距小于0.65mm 时,引脚容易弯曲。为了防止引脚变形,现已 出现了几种改进的QFP 品种。如封装的四个角带有树指缓冲垫的BQFP(见BQFP);带树脂 保护 环覆盖引脚前端的GQFP(见GQFP);在封装本体里设置测试凸点、放在防止引脚变形的专 用夹 具里就可进行测试的TPQFP(见TPQFP)。在逻辑LSI 方面,不少开发品和高可靠品都封装在多层陶瓷QFP 里。引脚中心距最小为 0.4mm、引脚数最多为348 的产品也已问世。此外,也有用玻璃密封的陶瓷QFP(见Gerqa d)。


(FP)(QFP fine pitch)

小中心距QFP。日本电子机械工业会标准所规定的名称。指引脚中心距为0.55mm、0.4mm 、 0.3mm 等小于0.65mm 的QFP(见QFP)。


(quad in-line ceramic package)

陶瓷QFP 的别称。部分半导体厂家采用的名称(见QFP、Cerquad)。


(quad in-line plastic package)

塑料QFP 的别称。部分半导体厂家采用的名称(见QFP)。


(quad tape carrier package)

四侧引脚带载封装。 TCP 封装之一,在绝缘带上形成引脚并从封装四个侧面引出。是利 用 TAB 技术的薄型封装(见TAB、TCP)。


(quad tape carrier package)

四侧引脚带载封装。日本电子机械工业会于1993 年4 月对QTCP 所制定的外形规格所用 的 名称(见TCP)。


(quad in-line)

QUIP 的别称(见QUIP)。


(quad in-line package)

四列引脚直插式封装。引脚从封装两个侧面引出,每隔一根交错向下弯曲成四列。引脚 中 心距1.27mm,当插入印刷基板时,插入中心距就变成2.5mm。因此可用于标准印刷线路板。是 比标准DIP 更小的一种封装。日本电气公司在台式计算机和家电产品等的微机芯片中采 用了些 种封装。材料有陶瓷和塑料两种。引脚数64。


(shrink dual in-line package)

收缩型DIP。插装型封装之一,形状与DIP 相同,但引脚中心距(1.778mm)小于DIP(2.54 mm),

因而得此称呼。引脚数从14 到90。也有称为SH-DIP 的。材料有陶瓷和塑料两种。


(shrink dual in-line package)



(single in-line)

SIP 的别称(见SIP)。欧洲半导体厂家多采用SIL 这个名称。


(single in-line memory module)

单列存贮器组件。只在印刷基板的一个侧面附近配有电极的存贮器组件。通常指插入插 座 的组件。标准SIMM 有中心距为2.54mm 的30 电极和中心距为1.27mm 的72 电极两种规格 。在印刷基板的单面或双面装有用SOJ 封装的1 兆位及4 兆位DRAM 的SIMM 已经在个人 计算机、工作站等设备中获得广泛应用。至少有30~40%的DRAM 都装配在SIMM 里。


(single in-line package)

单列直插式封装。引脚从封装一个侧面引出,排列成一条直线。当装配到印刷基板上时 封 装呈侧立状。引脚中心距通常为2.54mm,引脚数从2 至23,多数为定制产品。封装的形 状各 异。也有的把形状与ZIP 相同的封装称为SIP。


(skinny dual in-line package)

DIP 的一种。指宽度为7.62mm、引脚中心距为2.54mm 的窄体DIP。通常统称为DIP(见 DIP)。


(slim dual in-line package)

DIP 的一种。指宽度为10.16mm,引脚中心距为2.54mm 的窄体DIP。通常统称为DIP。


(surface mount devices)

表面贴装器件。偶而,有的半导体厂家把SOP 归为SMD(见SOP)。

SOP 的别称。世界上很多半导体厂家都采用此别称。 (见SOP)。


(small out-line I-leaded package)

I 形引脚小外型封装。表面贴装型封装之一。引脚从封装双侧引出向下呈I 字形,中心 距 1.27mm。贴装占有面积小于SOP。日立公司在模拟IC(电机驱动用IC)中采用了此封装。引 脚数 26。


(small out-line integrated circuit)

SOP 的别称(见SOP)。国外有许多半导体厂家采用此名称。


(Small Out-Line J-Leaded Package)

J 形引脚小外型封装。表面贴装型封装之一。引脚从封装两侧引出向下呈J 字形,故此 得名。通常为塑料制品,多数用于DRAM 和SRAM 等存储器LSI 电路,但绝大部分是DRAM。用SO J 封装的DRAM 器件很多都装配在SIMM 上。引脚中心距1.27mm,引脚数从20 至40(见SIMM )。


(Small Out-Line L-leaded package)

按照JEDEC(美国联合电子设备工程委员会)标准对SOP 所采用的名称(见SOP)。


(Small Out-Line Non-Fin)

无散热片的SOP。与通常的SOP 相同。为了在功率IC 封装中表示无散热片的区别,有意 增添了NF(non-fin)标记。部分半导体厂家采用的名称(见SOP)。


(small Out-Line package)

小外形封装。表面贴装型封装之一,引脚从封装两侧引出呈海鸥翼状(L 字形)。材料有 塑料 和陶瓷两种。另外也叫SOL 和DFP。

SOP 除了用于存储器LSI 外,也广泛用于规模不太大的ASSP 等电路。在输入输出端子不 超过10~40 的领域,SOP 是普及最广的表面贴装封装。引脚中心距1.27mm,引脚数从8 ~44。

另外,引脚中心距小于1.27mm 的SOP 也称为SSOP;装配高度不到1.27mm 的SOP 也称为 TSOP(见SSOP、TSOP)。还有一种带有散热片的SOP。


(Small Outline Package(Wide-Jype))



从1930年代开始,元素周期表中的化学元素中的半导体被研究者如贝尔实验室的William Shockley认为是固态真空管的最可能的原料。从氧化铜到锗,再到硅,原料在1940到1950年代被系统的研究。今天,尽管元素周期表的一些III-V价化合物如砷化镓应用于特殊用途如:发光二极管,激光,太阳能电池和最高速集成电路,单晶硅成为集成电路主流的基层。创造无缺陷晶体的方法用去了数十年的时间。








IC 由很多重叠的层组成,每层由图像技术定义,通常用不同的颜色表示。一些层标明在哪里不同的掺杂剂扩散进基层(成为扩散层),一些定义哪里额外的离子灌输(灌输层),一些定义导体(多晶硅或金属层),一些定义传导层之间的连接(过孔或接触层)。所有的组件由这些层的特定组合构成。






随机存取存储器(random access memory)是最常见类型的集成电路,所以密度最高的设备是存储器,但即使是微处理器上也有存储器。尽管结构非常复杂-几十年来芯片宽度一直减少-但集成电路的层依然比宽度薄很多。组件层的制作非常像照相过程。虽然可见光谱中的光波不能用来曝光组件层,因为他们太大了。高频光子(通常是紫外线)被用来创造每层的图案。因为每个特征都非常小,对于一个正在调试制造过程的过程工程师来说,电子显微镜是必要工具。

在使用自动测试设备(ATE)包装前,每个设备都要进行测试。测试过程称为晶圆测试或晶圆探通。晶圆被切割成矩形块,每个被称为“die”。每个好的die 被焊在“pads”上的铝线或金线,连接到封装内,pads通常在die的边上。封装之后,设备在晶圆探通中使用的相同或相似的ATE上进行终检。测试成本可以达到低成本产品的制造成本的25%,但是对于低产出,大型和/或高成本的设备,可以忽略不计。

在2005年,一个制造厂(通常称为半导体工厂,常简称fab,指fabrication facility)建设费用要超过10亿美金,因为大部分操作是自动化的。


2001年到2010年这10年间,我国集成电路产量的年均增长率超过25%,集成电路销售额的年均增长率则达到23%。 2010年国内集成电路产量达到640亿块,销售额超过1430亿元,分别是2001年的10倍和8倍。中国集成电路产业规模已经由2001年不足世界集成电路产业总规模的2%提高到2010年的近9%。中国成为过去10年世界集成电路产业发展最快的地区之一。



我国集成电路产业发展的生态环境亟待优化,设计、制造、封装测试以及专用设备、仪器、材料等产业链上下游协同性不足,芯片、软件、整机、系统、应用等各环节互动不紧密。 “十二五”期间,中国将积极探索集成电路产业链上下游虚拟一体化模式,充分发挥市场机制作用,强化产业链上下游的合作与协同,共建价值链。培育和完善生态环境,加强集成电路产品设计与软件、整机、系统及服务的有机连接,实现各环节企业的群体跃升,增强电子信息大产业链的整体竞争优势。



从理论上讲,商务成本属于成本性的静态效率范畴,在产业发展的初级阶段作用显著。外部商务成本的上升实际上是产业升级、创新驱动的外部动力。作为高新技术产业的上海集成电路产业,需要积极利用产业链完备、内部结网度较高、与全球生产网络有机衔接等集群优势,实现企业之间的互动共生的高科技产业机体的生态关系,有效保障并促进产业创业、创新的步伐。事实表明,20世纪80年代,虽然硅谷的土地成本要远高于128公路地区,但在硅谷建立的半导体公司比美国其他地方的公司开发新产品的速度快60%,交运产品的速度快40%。具体而言,就是硅谷地区的硬件和软件制造商结成了紧密的联盟,能最大限度地降低从创意到制造出产品等相关过程的成本,即通过技术密集关联为基本的动态创业联盟,降低了创业成本,从而弥补了静态的商务成本劣势 。


许多归国创业的设计人才认为,中国的消费者是世界上最好的衣食父母,与欧美发达国家相比,我们的消费者对新产品充满好奇,一般不退货,基本无赔偿。这些特点为设计企业的创业、创新与发展提供了良好的市场机遇。企业要善于去发现产品应用,寻找市场 。

设计公司扩张主要是受限于人才与产品定位。由于在人才团队、市场和产品定义方面的不足,初创公司不可能做大项目,不适合于做集聚型大项目。现有的大多数设计企业还是适合于分散型市场,主动去支持系统厂商,提供大量的服务。人力密集型业务项目不适合欧美公司,更适合我们。例如,在国内市场上,如果一个产品能出货300万颗,那么公司就会去做,国外企业则不可能去做它 。


海归人才在国外做了很多超前的技术开发研究,并且在全球一些顶尖公司内有产业经验,回国后从事很有需求的产品开发应用,容易成功。集成电路产业的研发就怕方向性错误与低水平重复,海归人才知道如何去做才能够成功 。


配套改革试点的政策优势,将单纯吸引留学生变为吸引留学生、国外精英等高层次人才。通过科学城建设以及个人所得税率的国际化调整、落户政策的优化,发挥上海“海派文化”传统,将张江建设成为世界各国人才汇集、安居乐业的新故乡,大幅提升张江在高层次人才争夺中的国际竞争力 。



集成电力产业人才尤其是设计人才供给问题长期以来是舆论界关注的热点,许多高校在专业与设置、人才培养方面急功近利,片面追随所谓社会热点和学业对口,导致学生的基本综合素质和人文科学方面的素养不够高,知识面过窄。事实上,众多设计企业普遍反映,他们招聘人才的标准并非是单纯的所谓专业对口,而是更注重基础知识和综合素质,他们普遍反映高校的教育太急功近利了 。


国内企业之间的横向联系少,外包刚刚起步,基本上每个设计企业都有自己的芯片,都在进行全面发展。这些因素都限制了企业的快速发展。要充分运用华南一些企业为国外做的解决方案,这样终端客户就可以直接将公司产品运用到原有解决方案上去。此外,设计企业要与方案商、通路商、系统厂商形成紧密的战略合作伙伴关系 。


产学研一体化一直被各界视为促进高新技术产业发展的良方,但实地调研结果暴露出人们在此方面存在着不切实际的幻想。笔者所调研的众多设计企业对高校帮助做产品不抱任何指望。公司项目要求的进度快,存在合作的时间问题;高校一般不具备可以使工厂能更有效利用厂房空间,也适用于研发中心的使用。新开发的空冷系统减少了对外部设施的依赖,可在任意位置安装设置,同时继续支持符合STC标准的各种T2000模块,满足各种测试的需要 。


晶体管发明并大量生产之后,各式固态半导体组件如二极管、晶体管等大量使用,取代了真空管在电路中的功能与角色。到了20世纪中后期半导体制造技术进步,使得集成电路成为可能。相对于手工组装电路使用个别的分立电子组件,集成电路可以把很大数量的微晶体管集成到一个小芯片,是一个巨大的进步。集成电路的规模生产能力,可靠性,电路设计的模块化方法确保了快速采用标准化IC 代替了设计使用离散晶体管。

IC 对于离散晶体管有两个主要优势:成本和性能。成本低是由于芯片把所有的组件通过照相平版技术,作为一个单位印刷,而不是在一个时间只制作一个晶体管。性能高是由于组件快速开关,消耗更低能量,因为组件很小且彼此靠近。 2006年,芯片面积从几平方毫米到350 mm2,每mm2可以达到一百万个晶体管。




SSI 英文全名为 Small Scale Integration, 逻辑门10个以下 或 晶体管 100个以下。


MSI 英文全名为 Medium Scale Integration, 逻辑门11~100个 或 晶体管 101~1k个。


LSI 英文全名为 Large Scale Integration, 逻辑门101~1k个 或 晶体管 1,001~10k个。


VLSI 英文全名为 Very large scale integration, 逻辑门1,001~10k个 或 晶体管 10,001~100k个。


ULSI 英文全名为 Ultra Large Scale Integration, 逻辑门10,001~1M个 或 晶体管 100,001~10M个。

GLSI 英文全名为 Giga Scale Integration, 逻辑门1,000,001个以上 或 晶体管10,000,001个以上。



最先进的集成电路是微处理器或多核处理器的"核心(cores)",可以控制电脑到手机到数字微波炉的一切。存储器和ASIC是其他集成电路家族的例子,对于现代信息社会非常重要。虽然设计开发一个复杂集成电路的成本非常高,但是当分散到通常以百万计的产品上,每个IC的成本最小化。 IC的性能很高,因为小尺寸带来短路径,使得低功率逻辑电路可以在快速开关速度应用。

这些年来,IC 持续向更小的外型尺寸发展,使得每个芯片可以封装更多的电路。这样增加了每单位面积容量,可以降低成本和增加功能-见摩尔定律,集成电路中的晶体管数量,每两年增加一倍。总之,随着外形尺寸缩小,几乎所有的指标改善了-单位成本和开关功率消耗下降,速度提高。但是,集成纳米级别设备的IC不是没有问题,主要是泄漏电流(leakage current)。因此,对于最终用户的速度和功率消耗增加非常明显,制造商面临使用更好几何学的尖锐挑战。这个过程和在未来几年所期望的进步,在半导体国际技术路线图(ITRS)中有很好的描述。






数字集成电路可以包含任何东西,在几平方毫米上有从几千到百万的逻辑门,触发器,多任务器和其他电路。这些电路的小尺寸使得与板级集成相比,有更高速度,更低功耗并降低了制造成本。这些数字IC, 以微处理器,数字信号处理器(DSP)和单片机为代表,工作中使用二进制,处理1和0信号。


IC可以把模拟和数字电路集成在一个单芯片上,以做出如模拟数字转换器(A/D converter)和数字模拟转换器(D/A converter)等器件。这种电路提供更小的尺寸和更低的成本,但是对于信号冲突必须小心。

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