автобус

Как работи

IftheMotherBoardisacity,thenthebusislikeabusinthecity,whichcanbetransmittedbackandforthaccordingtoafixedroute.Operatingbit(bit).Alinecanonlyberesponsiblefortransmittingonebitatthesametime.Therefore,multiplelinesmustbeusedatthesametimetotransmitmoredata,andthenumberofdatathatthebuscantransmitatthesametimeiscalledwidth,inbits,thelargerthebuswidth,thebetterthetransmissionperformance.Thebusbandwidth(thatis,thetotalnumberofdatathatcanbetransmittedperunittime)is:busbandwidth=frequencyxwidth(Bytes/sec).Whenthebusisidle(otherdevicesareconnectedtothebusinahigh-impedancestate)andadevicewantstocommunicatewiththetargetdevice,thedevicethatinitiatesthecommunicationdrivesthebusandsendsoutaddressesanddata.Ifotherdevicesconnectedtothebusinahigh-impedancestatereceive(orcanreceive)theaddressinformationthatmatchestheirown,theywillreceivethedataonthebus.Thesendingdevicecompletesthecommunicationandgivesupthebus(theoutputbecomesahighimpedancestate).

Apubliclineorchannelusedinacomputertoconnectvariousfunctionalcomponentsandtransmitdatabetweenthem.Accordingtotheconnectedobjectsinthecomputersystem,thebuscanbedividedinto:Chipbus,alsoknownasthedevice-levelbus,whichisthebusinsidethecentralprocessingunitchip.Вътрешен автобус,alsoknownassystembusorboard-levelbus,isthetransmissionpathbetweenthefunctionalunitsofthecomputer.Microcomputerbusisusuallycalledinternalbus.Външен автобус,alsoknownascommunicationbus,isatransmissionpathbetweencomputersystemsorbetweenacomputerhostandperipheraldevices.

Thebusisashareddatatransmissiondevice.Althoughmultipledevicescanbeconnectedtothebus,usuallyonlyonepairofdevicescanparticipateindatatransmissionatanyonetime.Accordingtotheformofinformationtransmission,thebuscanbedividedintotwotypes:parallelbusandserialbus.Parallelbususesntransmissionlinestotransmitn-bitbinaryinformationatthesametime.Itischaracterizedbyfasttransmissionspeed,butthesystemstructureismorecomplicated.Itisusedfortheconnectionbetweenvariouscomponentsinthecomputersystem;serialbussharesmulti-bitbinaryinformationOnatransmissionline,multiplebitsofbinaryinformationpassthroughthebusinchronologicalorder.Itischaracterizedbyasimplestructure,butitstransmissionspeedisrelativelyslow.Thebusmusthaveaclearspecification:Bustiming protocol,thatis,certaintimingrulesmustbeobservedwhentransmittinginformationonthebus,suchassynchronousbustiming,asynchronousbustiming,semi-synchronousbustiming,etc.Thephysicalcharacteristicsofthebus,includingtheelectricalcharacteristicsofsignals,powersupplies,andaddresses,aswellasthemechanicalcharacteristicsofconnectionsandconnectors.Busbandwidth,itisthehighesttransferratethatthebuscanreach,anditsunitisMB/S.

Buscharacteristics

Becausethebusisasetofsignallinesconnectingvariouscomponents.Theinformationisrepresentedbythesignalonthesignalline,andtheoperationcanbeagreeduponbyagreeingonthesequenceofdifferentsignals.Thecharacteristicsofthebusareasfollows

  • (1)Physicalcharacteristics:Physicalcharacteristicsarealsoknownasmechanicalcharacteristics,whichrefertosomecharacteristicsshownbythecomponentsonthebuswhentheyarephysicallyconnected,suchasplugsandsockets.Geometry,shape,numberofpinsandarrangementorder,etc.

  • (2)Functionalcharacteristics:Functionalcharacteristicsrefertothefunctionofeachsignalline,suchastheaddressbususedtorepresenttheaddresscode.Thedatabusisusedtorepresentthetransmitteddata,andthecontrolbusrepresentsthecommandsandstatusofoperationsonthebus.

  • (3)Electricalcharacteristics:Electricalcharacteristicsrefertothesignaldirectionofeachsignallineandtheeffectivelevelrangeofthesignal.Usually,themainequipment(suchasCPU)Thesignalsentoutiscalledtheoutputsignal(OUT),andthesignalsenttothemaindeviceiscalledtheinputsignal(IN).Generally,datasignalsandaddresssignalsdefinehighlevelaslogic1andlowlevelaslogic0.Thereisnoconventionalconventionforcontrolsignals.Forexample,WEmeanslowlevelisvalid,andReadymeanshighlevelisvalid.Thereisnouniformregulationforthehighandlowlevelrangesofdifferentbuses,andtheyareusuallyconsistentwithTTL.

  • (4)Timecharacteristics:Timecharacteristicsarealsocalledlogiccharacteristics,whichrefertowhenthesignaloneachsignallineisvalidduringthebusoperation,anditisvalidthroughthissignalThetimingrelationshipagreementensuresthecorrectoperationofthebus.Inordertoimprovethescalabilityofthecomputerandtheversatilityofcomponentsandequipment,inadditiontotheon-chipbus,eachcomponentordeviceisconnectedtothebusinastandardizedform,andinformationtransmissiononthebusisrealizedinastandardizedway.Thesestandardizedconnectionformsandoperationmodesofthebusarecollectivelyreferredtoasbusstandards.SuchasISA,PCI,USBbusstandards,etc.Correspondingly,thebusesusingthesestandardsareISAbus,PCIbus,USBbus,etc.

Шинова класификация

Buscanbedividedintofivemajortypesaccordingtofunctionsandspecifications:

  • DataBus:TransferdatathatneedstobeprocessedorneedstobestoredbackandforthbetweenCPUandRAM.

  • AddressBus:UsedtospecifytheaddressofthedatastoredinRAM(RandomAccessMemory).

  • ControlBus:Transmitthesignalofthemicroprocessorcontrolunit(ControlUnit)toperipheralequipment.

  • ExpansionBus:Thebusfordatacommunicationbetweenexternaldevicesandthecomputerhost,suchasISAbusandPCIbus.

  • Местен автобус:Anexpansionbusthatreplaceshigher-speeddatatransmission.

Шината на данниDB(DataBus),адреснаташинаAB(AddressBus)и контролнаташинаCB(ControlBus)също се наричат ​​колективно системнашина,което е обичайното значениенашината,спомената по-горе.

Insomesystems,thedatabusandtheaddressbusaremultiplexed,thatis,thesignalthatappearsonthebusatcertainmomentsrepresentsdataandothermomentsrepresentaddresses;andsomesystemsareseparate.Theaddressbusanddatabusofthe51seriessingle-chipmicrocomputeraremultiplexed,whilethebusinthegeneralPCisseparate.

"DataBusDB"isusedtotransmitdatainformation.Thedatabusisatwo-waythree-statebus,thatis,itcantransmitdatafromtheCPUtoothercomponentssuchasamemoryorI/Ointerface,andcanalsotransmitdatafromothercomponentstotheCPU.Thenumberofbitsofthedatabusisanimportantindicatorofthemicrocomputer,anditisusuallyconsistentwiththewordlengthofthemicro-processing.Forexample,thewordlengthoftheIntel8086microprocessoris16bits,anditsdatabuswidthisalso16bits.Itshouldbepointedoutthatthemeaningofdataisbroad.Itcanberealdata,instructioncodeorstatusinformation,andsometimesevencontrolinformation.Therefore,inactualwork,whatistransmittedonthedatabusisnotnecessarilyIt'sjustdatainthetruesense.

Общите шини на данни са ISA (ISAbus), EISA, VESA, PCI и др.

"AddressbusAB"isspeciallyusedtotransmitaddresses.SincetheaddresscanonlybetransmittedfromtheCPUtotheexternalmemoryorI/Oport,theaddressbusisalwaysone-waythree-state,whichisdifferentfromthedataThebusisdifferent.ThenumberofbitsoftheaddressbusdeterminesthesizeofthememoryspacethatcanbedirectlyaddressedbytheCPU.Forexample,iftheaddressbusofan8-bitmicrocomputeris16bits,themaximumaddressablespaceis2^16=64KB,andthe16-bitmicrocomputer(x-bitprocessingThedevicereferstothenumberofbits(1,0)thatthemicroprocessorcanhandleinoneclockcycle,thatis,thewordlength).Theaddressbusis20bits,anditsaddressablespaceis2^20=1MB.Generallyspeaking,iftheaddressbushasnbits,theaddressablespaceis2^nbytes.

"ControlbusCB"isusedtotransmitcontrolsignalsandtimingsignals.SomeofthecontrolsignalsaresentbythemicroprocessortothememoryandI/Ointerfacecircuits,suchasread/writesignals,chipselectsignals,interruptresponsesignals,etc.;therearealsoothercomponentsthatarefedbacktotheCPU,suchasinterruptrequestsignals,resetSignals,busrequestsignals,equipmentreadysignals,etc.Therefore,thetransmissiondirectionofthecontrolbusisdeterminedbythespecificcontrolsignal,(information)isgenerallybidirectional,andthenumberofbitsofthecontrolbusshouldbedeterminedaccordingtotheactualcontrolneedsofthesystem.Infact,thespecificsituationofthecontrolbusmainlydependsontheCPU.

Accordingtothewayoftransmittingdata,itcanbedividedintoserialbusandparallelbus.Intheserialbus,thebinarydataissenttothedestinationdevicethroughadatalinebitbybit;thedatalinesoftheparallelbususuallyexceedtwo.CommonserialbusesincludeSPI,I2C,USBandRS232.

Accordingtowhethertheclocksignalisindependent,itcanbedividedintoasynchronousbusandanasynchronousbus.Theclocksignalofthesynchronousbusisindependentofthedata,whiletheclocksignaloftheasynchronousbusisextractedfromthedata.SPIandI2Caresynchronousserialbuses,andRS232usesasynchronousserialbuses.

Вътрешен автобус

Паралелност

  • CAMAC, използвана система за откриване на инструменти

  • IndustryStandardArchitectureBus(ISA)

  • Разширена ISA (EISA)

  • LowPinCount(LPC)

  • Микроканал (MCA)

  • MBus

  • Мултибус, Използва се в промишлени производствени системи

  • NuBus или IEEE1196

  • OPTilocalbus,използвани най-рано дънни платки Intel80486

  • PeripheralComponent InterconnectBus (PCI)

  • S-100bus(S-100bus), или IEEE696, Използва се в Altair или подобни микропроцесори

  • SBusorIEEE1496

  • VESAlocalbus(VLB,VL-bus)

  • VERSAmoduleEurocardbus(VMEbus)

  • STDbus(STDbus), използвана от осем или десет Шест-битова микропроцесорна система

  • Унибус

  • Q-Bus

  • PC/104

  • PC/104Plus

  • PC/104Express

  • PCI-104

  • PCIe-104

Сериен

  • 1-проводник

  • Хипертранспорт

  • I²C

  • СериенPCI(PCIe)

  • Сериен периферен интерфейс (SPIbus)

  • FireWirei.Link(IEEE1394)

Външен автобус

Външен автобусreferstothecableandconnectorsystemusedtotransmitdataandcontrolspecifiedbyI/OpathtechnologySignal,inadditiontoabusterminationresistororcircuit,thisterminationresistorisusedToreducethesignalreflectioninterferenceonthecable.

Паралелност

  • ATA: периферна допълнителна шина за диск/лента, известна още като PATA, IDE, EIDE, ATAPI и т.н.

  • HIPPI(HIghPerformanceParallelInterface):Високоскоростен паралелен интерфейс.

  • IEEE-488: Известен също като GPIB (InstrumentationBus с общо предназначение) или HPIB (Hewlett-PackardInstrumentationBus).

  • PCcard:Formerlyknownasthewell-knownPCMCIA,itisoftenusedinnotebookcomputersandotherportabledevices,butsincetheintroductionofUSBandembeddednetworks,thisThebusisslowlynolongerused.

  • SCSI(SmallComputerSystemInterface):интерфейс на малка компютърна система,допълнителна шина за диск/лента.

Сериен

  • USBUniversalСериенBus,alargenumberofexternaldevicesusethisbus

  • СериенAttachedSCSI и други серийни SCSIbuses

  • СериенATA

  • ControllerAreaNetwork("CANbus")

  • ОВОС-485

  • FireWire

  • мълния

Компютърна шина

Компютърна шинаisasetofinformationtransmissionlinesthatcanbesharedbymultiplecomponentsintime,usedtoconnectmultiplecomponentsandprovideinformationforthemExchangepath.Thebusisnotonlyasetofsignallines,inabroadsense,thebusisasetoftransmissionlinesandrelatedbusprotocols.

a.Mainboardbus

Incomputerscienceandtechnology,peopleoftendescribethebusfrequencyinMHz.Therearemanytypesofcomputerbuses.TheEnglishnameofthefrontsidebusisFrontSideBus,whichisusuallyrepresentedbyFSB,whichisthebusthatconnectstheCPUtotheNorthBridgechip.Thecomputer'sfront-sidebusfrequencyisjointlydeterminedbytheCPUandtheNorthbridgechip.

b.Harddiskbus

GenerallythereareSCSI,ATA,SATAandsoon.SATAistheabbreviationofСериенATA.WhyuseСериенATAistostartwithPATA-theshortcomingsofParallelATA.WeknowthatthedatalinesofATAorordinaryIDEharddiskswereoriginally40cables.These40cableshavedatalines,clocklines,controllines,andgroundlines.Amongthem,32datalinesaretransmittedinparallel(oneclockcycle).Cantransmit4bytesofdataatthesametime),sotherequirementsforsynchronizationareveryhigh.Thisiswhy80harddiskdatacablesmustbeusedstartingfromthePATA-66(thatis,DMA66)interface.Infact,theadded40cablesareallgroundcablesforshielding,andtheyareonlygroundedononesideofthemotherboard(donotconnectOnthecontrary,iftheshieldingeffectisreversed,theshieldingeffectwillbegreatlyreduced),andthetransmissionspeedoftheshieldedharddiskcanreach66MB/s,100MB/sandthehighest133MB/s.However,afterPATA-133,theparalleltransmissionspeedhasreacheditslimit,andthethreemajorshortcomingsofPATAarefullyexposed:thelengthofthesignallinecannotbeextended,thesignalsynchronizationisdifficulttomaintain,andthe5Vsignallineconsumesalotofpower.ThenwhythedatacableoftheSCSI-320interfacecanreachthehighspeedof320MB/s,andthecablecanbeverylong?HaveyounoticedthatSCSIhigh-speeddatalinesare"flowerlines"?Thisisnottolookgood,the"flower"partisactuallyasetofdifferentialsignallinestwistedinpairs.Thiscostisnotsomethingordinarycomputersystemsarewillingtobear.

c.Други автобуси

Други шини в компютъра включват: универсална серийна шина (Universal СериенBus), IEEE1394, PCI и др.

Технически показатели

1.Thebandwidthofthebus(busdatatransferrate)

ThebandwidthofthebusreferstotheunittimeTheamountofdatatransmittedonthebus,thatis,themaximumsteady-statedatatransmissionrateofMBtransmittedpersecond.Twofactorscloselyrelatedtothebusarethebitwidthofthebusandtheworkingfrequencyofthebus.Therelationshipbetweenthem:

Ширината на честотната лента на шината = работната честота на шината * ширината на бита на шината / 8

Orbusbandwidth=(busbitwidth/8)/buscycle

2,busbitwidth

busbitWidthreferstothenumberofbitsofbinarydatathatthebuscantransmitatthesametime,orthenumberofbitsofadatabus,thatis,theconceptofbuswidthssuchas32bitsand64bits.Thewiderthebitwidthofthebus,thegreaterthedatatransferratepersecond,andthewiderthebandwidthofthebus.

3. Работната честота на автобуса

TheworkingclockfrequencyofthebusisinMHZ.Thehighertheworkingfrequency,thefasterthebusworkingspeedandthebusbandwidth.Wider.

Разумно разпределение

Themotherboardnorthbridgechipisresponsibleforcontactingthememory,graphicscardandothercomponentswiththelargestdatathroughput,andconnectswiththesouthbridgechip.TheCPUisconnectedtothenorthbridgechipthroughthefrontsidebus(FSB),andthenexchangesdatawiththememoryandthegraphicscardthroughthenorthbridgechip.Thefront-sidebusisthemostimportantchannelfortheCPUtoexchangedatawiththeoutsideworld.Therefore,thedatatransmissioncapabilityofthefront-sidebushasagreateffectontheoverallperformanceofthecomputer.Themaximumbandwidthofdatatransmissiondependsonthewidthandtransmissionfrequencyofallsimultaneouslytransmitteddata,thatis,databandwidth=(busfrequency×databitwidth)÷8.Thefront-sidebusfrequenciesthatcanbeachievedonthePCare266MHz,333MHz,400MHz,533MHz,800MHz.Thelargerthefront-sidebusfrequency,thegreaterthedatatransmissioncapacitybetweentheCPUandtheNorthbridgechip,andthemoretheCPUcanbefullyutilized.Function.CPUtechnologyhasdevelopedrapidly,andcomputingspeedhasincreasedrapidly,andalargefront-sidebuscanguaranteeenoughdatatobesuppliedtotheCPU,andalowerfront-sidebuswillnotbeabletosupplyenoughdatatotheCPU,whichlimitstheperformanceoftheCPU.,Becomeasystembottleneck.

Автобусна експлоатация

Oneoperationprocessofthebusistocompletethetransferofinformationbetweentwomodules.Themastermodulestartstheoperationprocess,andtheotheristheslavemodule.Onlyonemainmoduleonthebuscanoccupythebusatacertaintime.

Операционни стъпки на автобуса:

Themainmoduleappliesforbuscontrol,andthebuscontrollermakesaruling.

Операционни стъпки на автобуса:

Themastermodulewilladdresstheslavemoduleafterobtainingthebuscontrolright,andthentheslavemodulewillconfirmthedatatransmission.

Проверка на грешки при предаване на данни.

Bustiming protocol:Thetimingprotocolcanensurethatthetwosidesofthedatatransmissionaresynchronizedinoperationandthetransmissioniscorrect.Therearethreetypesoftimingprotocols:

Synchronousbustiming:Allmodulesonthebussharethesameclockpulsetocontroltheoperationprocess.Allactionsofeachmodulearegeneratedatthebeginningoftheclockcycle,andmostactionsarecompletedinoneclockcycle.

Asynchronousbustiming:Theoccurrenceoftheoperationisdeterminedbythespecificsignalofthesourceordestinationmodule.Theoccurrenceofaneventonthebusdependsontheoccurrenceofthepreviousevent,andthetwopartiesprovidecommunicationsignalstoeachother.

Bustiming protocol

Semi-synchronousbustiming:Thetimeintervalofeachoperationonthebuscanbedifferent,butitmustbeanintegermultipleoftheclockcycle.Theappearanceofthesignal,thesamplingandtheendarestillThepublicclockisthereference.TheISAbususesthistimingmethod.

Datatransmissiontype:dividedintosinglecyclemodeandburstmode.

Singlecyclemode:Onlyonedataistransmittedinonebuscycle.

Burstmode:Afterobtainingthecontrolofthemainline,multipledatatransmissionsarecarriedout.Whenaddressing,thefirstaddressofthedestinationisgiven,andthefirstdataisaccessed.Theaddressesofdata2,3todatanareautomaticallyaddressedbasedonthefirstaddressaccordingtocertainrules(suchasautomaticallyadding1).

Бусстандарт

Защоdevelopabusstandard?

Itisconvenientfortheexpansionofmachinesandtheadditionofnewequipment.Thereisabusstandard,Differentmanufacturerscanproducechips,modulesandcompletemachineswithdifferentfunctionsaccordingtothesamestandardsandspecifications.Userscanchoosemodulesanddevicesproducedbydifferentmanufacturersandbasedonthesamebusstandardaccordingtotheirfunctionalrequirements.Theycanevenfollowthestandards.Designspecialmodulesandequipmentwithspecialfunctionsbyyourselftoformtheapplicationsystemyouneed.Inthisway,productsatthechiplevel,modulelevel,anddevicelevelarecompatibleandinterchangeable,sothatthemaintainabilityandexpandabilityoftheentirecomputersystemcanbefullyguaranteed.

Техническата спецификация на стандарта на автобуса?

Mechanicalstructurespecification:modulesize,busplug,busconnectorandinstallationsizehaveunifiedregulations.

Functionspecification:Eachsignalline(nameofthepin),functionandworkingprocessofeachbusmusthaveunifiedregulations.

Електрически спецификации:ефективното ниво,време за динамично преобразуване,товароспособност и т.н.на всеки сигнал от линията на шината.

Кой автобус стандарт?

Theprocessor-mainmemorybusonthemotherboardisoftenaspecificdedicatedbus,whiletheI/Obusandзадна шинаusedtoconnectvariousI/OmodulesareusuallyavailableinInteroperableindifferentcomputers.Infact,theзадна шинаandI/Obusareusuallystandardbusesandcanbeusedbymanydifferentcomputersmanufacturedbydifferentcompanies.

BusStandard-ISA

ISA(IndustrialStandardArchitecture)busisasystembusstandardestablishedbyIBMin1984fortheintroductionofPC/ATmachines.SoitisalsocalledATbus.

Основните функции:

(1)Поддръжка64KI/Oaddressspace,16Mmainmemoryaddressspaceaddressing,support15-levelhardinterrupt,7-levelDMAchannel.

(2)isasimplemulti-masterbus.InadditiontotheCPU,DMAcontrollers,DRAMrefreshcontrollers,andintelligentinterfacecontrolcardswithprocessorscanallbecomebusmasterdevices.

(3) Поддържа 8 типа шинни транзакции: memoryread,memorywrite,I/Oread,I/Owrite,interruptresponse,DMAresponse,memoryrefresh,busarbitration.

Itsclockfrequencyis8MHz,andthereare98signallinesintotal.Thedatalineisseparatedfromtheaddressline.Thewidthofthedatalineis16bits,whichcantransmit8-bitor16-bitdata,sothemaximumdatatransferrateis16MB/s.

BusStandard-EISA

EISA(ExtendedIndustrialStanderdArchitecture)busisanopenbusstandardexpandedonthebasisofISAbus.Supportmulti-busmastercontrolandbursttransmissionmode.

Theclockfrequencyis8.33MHz.Thereare198signallinesintotal,and100lineshavebeenexpandedonthebasisof98linesoftheoriginalISAbus,whichisfullycompatiblewiththeoriginalISAbus.Ithasseparatedatalinesandaddresslines.Thedatalinewidthis32bits,with8-bit,16-bit,and32-bitdatatransmissioncapabilities,sothemaximumdatatransmissionrateis33MB/s.Thewidthoftheaddresslineis32bits,sotheaddressingcapabilityisupto232.Thatis:thesemasterdevicessuchasCPUorDMAcontrollercanaccessthe4Grangeofthemainmemoryaddressspace.

Бусстандарт-PCI

PCI (PeripheralComponent Interconnect) шина

isahigh-performance32-bitlocalbus.ItwasproposedbyIntelattheendof1991,andlaterjoinedwithmorethan100majorPCmanufacturerssuchasIBMandDECtoestablishthePCIGroupin1992,calledPCISIG,tocoordinateandpromotethePCIstandard.

I/O интерфейсът, използван за високоскоростни периферни устройства, е свързан към хоста. Използвайки собствената си честота на шината от 33MHz, данните се обновяват през тези 32 бита, които могат да бъдат разширени до 64 бита, така че скоростта на трансфер на данни може да достигне 132MB/s~264MB/s.

Fastspeed,supportunlimitedbursttransmissionmode,supportconcurrentwork(PCIbridgeprovidesdatabuffer,andmakesthebusindependentoftheCPU),andcanbeconnectedtoothersystembuses(suchas:ISA,EISAorMCA)isconnected,thehigh-speeddevicesinthesystemareconnectedtothePCIbus,whilethelow-speeddevicesarestillsupportedbythelow-speedI/ObusessuchasISAandEISA.Itsupportsmicroprocessor-basedconfigurationandcanbeusedinsingle-processorsystemsaswellasmulti-processorsystems.

Предимства и недостатъци

Основните предимства на използването на автобусната структура

1.Thememory-orienteddualbusstructurehashigherinformationtransmissionefficiency,Thisisitsmainadvantage.ButwhenboththeCPUandtheI/Ointerfacehavetoaccessthememory,conflictsstilloccur.

2.TheCPUisconnectedtothehigh-speedlocalmemoryandlocalI/Ointerfacethroughahigh-speedlocalbus,andtheslowerglobalmemoryandglobalI/Ointerfaceareconnectedtotheslowerglobalbus.Thus,bothhigh-speedequipmentandslow-speedequipmentaretakenintoconsideration,sothattheydonotinvolveeachother.

3.Simplifiesthehardwaredesign.Itisconvenienttoadoptthemodularstructuredesignmethod.Thebus-orientedmicrocomputerdesignonlyneedstomakecpuplug-in,memoryplug-inandI/Oplug-inaccordingtotheseregulations,andconnectthemtothebustoworkwithoutconsideringthedetailedoperationofthebus.

4.Simplifiedthesystemstructure.Thestructureofthewholesystemisclear.Therearefewconnections,andthebackplaneconnectionscanbeprinted.

5.Thesystemhasgoodscalability.Thefirstisscaleexpansion,whichonlyrequiresmoreplug-insofthesametype.Thesecondisfunctionexpansion.Thefunctionexpansiononlyneedstodesignnewplug-insinaccordancewiththebusstandard,andthereisoftennostrictrestrictiononthepositionwheretheplug-insareinsertedintothemachine.

6.Thesystemupdateperformanceisgood.Becausethecpu,memory,I/Ointerface,etc.areallconnectedtothebusaccordingtothebusprotocol,aslongasthebusisproperlydesigned,newplug-inscanbedesignedatanytimealongwiththeprogressoftheprocessorchipandotherrelatedchips.Thesystemisupdatedonthebottomboard,otherplug-insandbackplaneconnectionsgenerallydonotneedtobechanged.

7.Itisconvenientforfaultdiagnosisandmaintenance.Themainboardtestcardcaneasilyfindthefaultypartandthebustype.

Недостатъци на структурата на автобуса

BecausethebusissetupbetweentheCPUandthemainmemory,andbetweentheCPUandtheI/Odevice,itimprovesThespeedandefficiencyofinformationtransmissioninthemicrocomputersystemareimproved.However,becausethereisnodirectpathbetweentheexternaldeviceandthemainmemory,theinformationexchangebetweenthemmustbetransferredthroughtheCPU,whichreducestheworkefficiencyoftheCPU(orincreasestheoccupancyrateoftheCPU.Generallyspeaking,theperipheralworkThelessCPUinterventionisrequired,thebetter.ThelessCPUintervention,thelowertheCPUoccupancyrateofthisdevice,indicatingthehigherthedegreeofintelligenceofthedevice.ThisisthemaindisadvantageoftheCPU-orienteddual-busstructure.Italsoincludes:

1.Theuseofbustransmissionistime-sharing.Whenmultiplemastersapplyfortheuseofthebusatthesametime,arbitrationofthebusmustbecarriedout.

2.Thebandwidthofthebusislimited.Ifahardwaredeviceconnectedtothebusdoesnothavearesourcecontrolmechanism,itwilleasilycauseinformationdelay(thisisfatalinsomeplaceswithstrongimmediacy).

3.Thedeviceconnectedtothebusmusthaveaninformationscreeningmechanism,anditisnecessarytojudgewhethertheinformationispassedtoitself.

Свързана информация

Anymicroprocessormustbeconnectedtoacertainnumberofcomponentsandperipheraldevices,butifyouuseasetoflinesforeachcomponentandeachperipheraldeviceConnectdirectlywiththeCPU,thentheconnectionwillbeintricateandevendifficulttoimplement.Inordertosimplifythehardwarecircuitdesignandsimplifythesystemstructure,agroupoflinesiscommonlyused,andanappropriateinterfacecircuitisconfiguredtoconnectwithvariouscomponentsandperipheraldevices.Thisgroupofsharedconnectionlinesiscalledabus.Theuseofabusstructurefacilitatestheexpansionofcomponentsandequipment,especiallythedevelopmentofaunifiedbusstandardmakesiteasytointerconnectdifferentequipment.

Thebusinamicrocomputergenerallyincludesaninternalbus,asystembusandanexternalbus.Theinternalbusisthebusbetweentheperipheralchipsinthemicrocomputerandtheprocessor,whichisusedfortheinterconnectionatthechiplevel;whilethesystembusisthebusbetweentheplug-inboardsandthesystemboardinthemicrocomputer,andisusedforthemutualexchangeattheplug-inboardlevel.Theexternalbusisabusbetweenamicrocomputerandanexternaldevice.Asadevice,amicrocomputerexchangesinformationanddatawithotherdevicesthroughthebus.Itisusedfordevice-levelinterconnection.Inaddition,inabroadsense,computercommunicationmethodscanbedividedintoparallelcommunicationandserialcommunication,andthecorrespondingcommunicationbusesarecalledparallelbusesandserialbuses.Parallelcommunicationisfastandhasgoodreal-timeperformance,butitisnotsuitableforminiaturizedproductsduetothelargenumberofportsoccupied.Althoughtheserialcommunicationrateislow,itismoresimpleandconvenientinthemicro-processingcircuitwherethedatacommunicationthroughputisnotverylarge.Convenientandflexible.Сериенcommunicationcangenerallybedividedintoasynchronousmodeandsynchronousmode.---Withthedevelopmentofmicroelectronicstechnologyandcomputertechnology,bustechnologyisalsoconstantlydevelopingandimproving,sothatthecomputerbustechnologyhasawidevarietyandeachhasitsowncharacteristics.

Историята на развитието на автобуса

ISAbus

(IndustryStandardArchitecture)

TheearliestPCbusItisthesystembusadoptedbyIBMinPC/XTcomputersin1981.Itisbasedonthe8-bit8088processorandiscalledPCbusorPC/XTbus.

In1984,IBMintroducedthePC/ATcomputerbasedonthe16-bitIntel80286processor,andthesystembuswasalsoexpandedto16bit,andwascalledthePC/ATbus.InordertodevelopperipheraldevicescompatiblewiththeIBMPC,theindustrygraduallyestablishedtheISA(IndustryStandardArchitecture)busbasedontheIBMPCbusspecification.

PCIbus

(PeripheralComponent Interconnect)

DuetotheslowspeedoftheISA/EISAbus,thespeedoftheCPUonceappearedHigherthanthebusspeed,theharddisk,displaycardandotherperipheraldevicescanonlysendandreceivedatathroughaslowandnarrowbottleneck,whichseriouslyaffectstheperformanceofthewholemachine.Tosolvethisproblem,whenIntelreleasedthe486processorin1992,italsoproposeda32-bitPCI(peripheralcomponentinterconnect)bus.

AGPbus

(AcceleratedGraphicsPort)

ThePCIbusisasystembusindependentoftheCPU,whichcanconnectthedisplaycard,High-speedperipheralssuchassoundcards,networkcards,andharddiskcontrollersaredirectlyhungontheCPUbus,breakingthebottleneckandmakingtheCPUperformancefullyutilized.Unfortunately,becausethePCIbushasabandwidthofonly133MB/s,itmaybemorethanenoughtodealwithmostinput/outputdevicessuchassoundcards,networkcards,andvideocards,butfor3Dgraphicscardsthathaveagrowingappetite,theyareincapableandbecomeaconstraint.Displaythebottleneckofthesubsystemandtheperformanceofthewholemachine.Therefore,thecomplementofthePCIbus-theAGPbuscameintobeing.

PCI-Express

After10yearsofrepairsandrepairs,thePCIbushasbeenunabletomeettherequirementsofcomputerperformanceenhancement.Itmustbelargerandmoreadaptable.ThenewgenerationbuswithdeeperdevelopmentpotentialisreplacedbythePCI-Expressbus.

ComparedwiththePCIbus,thePCI-Expressbuscanprovideextremelyhighbandwidthtomeettheneedsofthesystem.ThebandwidthofthePCIExpressbus2.0standardisshowninthefollowingtable:

Afterthreeandahalfgenerations(AGPbusisjustanenhancedPCIbus),theexternalbusofPCfinallydevelopedtoPCI-E4.0,Providesamuchlargerbandwidththanthepreviousbus.Asforthefuturedirectionofbusdevelopment,Ibelieveitwillappearsoonaspeople'sdemandforbandwidthcontinuestoincrease.

Терминология

1.

междинна разпределителна шина

Междинен разпределителен автобус

2.

VESAlocalbus(VL-bus)VESA

Местен автобус

3.

анализ, busbounce

Busbounceанализ

4.

аналогова сумираща шина

Аналогова допълнителна шина

5.

архитектура, микроканална шина (MCA)

Структура на микроканална шина (система).

6.

td>

арбитражен автобус

арбитражен автобус

7.

арбитър,авт

Busarbiter

8.

задна шина

Backplanebus

9.

отстъпление, автобус

Busexit

10.

базова шина

Basebus

11.

емулация на автобусно време

Bustimingemulation

12.

автобусно интензивно

Интензивен автобус

13.

автобус-управление

Buscontrolunit

14.

автобус, комун

Комунален автобус

15.

автобус, сумиране

допълнителна шина

16.

шина, системна интеграция в реално време (RTSIBus)

Шина за системна интеграция в реално време

17.

шина, периферен интерфейс

периферна интерфейсна шина

18.

шина, мултисистемен интерфейс за разширение (MXIbus)

Мултисистемно разширение на интерфейсната шина

19.

автобус, многокапков паралел

Разклонениепаралелна шина

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20.

шина, микроканал

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